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The block cannot work on its own and needs SoC integration, e.g. the FIFO depths are not discoverable from the IP. Do not add a generic compatible and only list SoC specific compatibles. The file is named after the IP so that other SoCs integrating it can be added here. Signed-off-by: Aniket Limaye --- Dependencies: - This patch depends on unreleased dt-schema commit d1fbcafd6716 ("schemas: i2c: Document i2c-sda-hold-time-ns") [0] for newly added "i2c-sda-hold-time-ns" property, without which dt_binding_check will fail for Unevaluated properties. - [0]: https://github.com/devicetree-org/dt-schema/commit/d1fbcafd67168c1f736d81f335a05e18183148c3 Changes in v5: - Drop the local i2c-sda-hold-time-ns declaration, now provided by dt-schema (needs dt-schema commit d1fbcafd67). (Krzysztof Kozlowski) - DWC_i2c does not specify any constraints on fall times, on top of the generic I2C spec. Hence did not add min/max for them (same as v4). - Link to v4: https://lore.kernel.org/r/20261027-tda54-upstream-i2c-v4-1-ebeeaf87d181@ti.com Changes in v4: - Drop the approach of extending the existing i2c-designware-* driver with a MODEL_TI_TDA54 variant. Instead, add a new standalone driver (i2c-dwc-adv.c) and a new binding (snps,dwc-adv-i2c.yaml), since DWC_i2c is not register compatible with DW_apb_i2c. (Andy Shevchenko) - Drop the snps,tx-fifo-depth/snps,rx-fifo-depth DT properties from the new binding; FIFO depth is now tied to the compatible string via driver match data instead. (Conor Dooley) - Link to v3: https://lore.kernel.org/all/20260925-tda54-upstream-i2c-v3-1-544d74e992ff@ti.com/ Changes in v2: - Rename snps,dwc-i2c to ti,tda54-i2c - Link to v1: https://lore.kernel.org/r/20260919-tda54-upstream-i2c-v1-1-b0b9f77be18b@ti.com/ --- .../devicetree/bindings/i2c/snps,dwc-adv-i2c.yaml | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/snps,dwc-adv-i2c.yaml b/Documentation/devicetree/bindings/i2c/snps,dwc-adv-i2c.yaml new file mode 100644 index 000000000000..1dd3c61d5826 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/snps,dwc-adv-i2c.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/snps,dwc-adv-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare Advanced I2C (DWC_i2c) Controller + +maintainers: + - Aniket Limaye + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - ti,tda54-i2c + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: I2C functional clock (ic_clk) + - description: Register interface clock (pclk) + + clock-names: + items: + - const: ref + - const: pclk + + resets: + maxItems: 1 + + clock-frequency: + enum: [100000, 400000, 1000000, 3400000] + default: 400000 + + i2c-scl-falling-time-ns: + default: 300 + + i2c-sda-falling-time-ns: + default: 300 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + + i2c@53b00000 { + compatible = "ti,tda54-i2c"; + reg = <0x53b00000 0x1000>; + interrupts = ; + clocks = <&sysclk>, <&pclk>; + clock-names = "ref", "pclk"; + clock-frequency = <400000>; + i2c-sda-hold-time-ns = <300>; + #address-cells = <1>; + #size-cells = <0>; + }; +... -- 2.53.0