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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by CO1PEPF00018868.mail.protection.outlook.com (10.167.249.153) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.615.4 via Frontend Transport; Wed, 11 Nov 2026 16:43:41 +0000 Received: from [127.0.1.1] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.53; Wed, 11 Nov 2026 10:43:39 -0600 From: Mario Limonciello Subject: [PATCH v6 0/3] Fix amdgpu detection of pci=realloc Date: Wed, 11 Nov 2026 10:43:19 -0600 Message-ID: <20261111-vfct-regression-v6-0-393797bbb6e3@amd.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; 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This was previously adjusted to be a soft filter due to commit 11c141672045f ("drm/amdgpu: Fix VFCT bus number matching with soft filter") where if everything but the number matched to take a device. This however fails when there are two identical devices. Instead save the initial bus number to the PCI device structure and then match that. Link: https://lore.kernel.org/linux-pci/20261015124843.203905-1-mario.limonciello@amd.com/ Link: https://lore.kernel.org/amd-gfx/20261019194106.2796150-1-alexander.deucher@amd.com/ Signed-off-by: Mario Limonciello --- Changes in v6: - Capture the firmware secondary bus number when reading bridge windows and ignore unconfigured values so rescans cannot replace it with runtime data (Sashiko). - No change needed in the VFCT consumers; they continue to read the cached value from the upstream bridge. - Link to v5: https://patch.msgid.link/20261110-vfct-regression-v5-0-f49fae981bf3@amd.com Changes in v5: - Record the firmware secondary bus number only on the bridge struct pci_dev, guard it with a validity bit, and keep it across rescans (Bjorn, Lijo). - Drop pci_bus::number_initial and have amdgpu/radeon read the saved bridge number when matching VFCT entries. Changes in v4: - Retain secondary bus bus number for a bridge across rescans, and the child bus is initialized from it during allocation, before registration callbacks run. (Sashiko) - Rename variable to clarify it's for bridges (Lijo) - Link to v3: https://patch.msgid.link/20261026-vfct-regression-v3-0-fe9586ed6978@amd.com Changes in v3: - Preserve the firmware bus number across bridge renumbering, capturing the secondary bus number before pci_scan_bridge_extend() clears it. - Adjust member name in all patches - Add tags - Link to v2: https://patch.msgid.link/20261020-vfct-regression-v2-0-d2394d11450a@amd.com Changes in v2: - pci_alloc_dev(NULL) remains safe. - For buses behind a reassigned bridge, the PCI core now saves the firmware secondary bus number before clearing the bridge configuration and carries it into the newly allocated bus. Devices discovered there inherit that original number. - Add changes for radeon too. - Link to v1: https://patch.msgid.link/20261019-vfct-regression-v1-0-5a63ddd378dd@amd.com --- Mario Limonciello (3): PCI: Cache bridge firmware secondary bus number drm/amdgpu: Match VFCT using initial PCI bus number drm/radeon: Match VFCT using initial PCI bus number drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 23 ++++++++++------------- drivers/gpu/drm/radeon/radeon_bios.c | 25 +++++++++++-------------- drivers/pci/probe.c | 16 ++++++++++++++-- include/linux/pci.h | 4 ++++ 4 files changed, 39 insertions(+), 29 deletions(-) --- base-commit: c03c1a14507dfaf8b856c2608f9ac216021fc222 change-id: 20261019-vfct-regression-2142fc52852a Best regards, -- Mario Limonciello