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It carries the host physical APIC ID used to program the IRTE Destination field when the target vCPU is running (IRTE[IsRun] = 1). Rename the field to apicid everywhere in the IOMMU interface so the name matches the hardware semantics. No functional change is intended. Signed-off-by: Sairaj Kodilkar Reviewed-by: Vasant Hegde --- arch/x86/include/asm/irq_remapping.h | 2 +- arch/x86/kvm/svm/avic.c | 12 +++++----- drivers/iommu/amd/iommu.c | 35 ++++++++++++++-------------- include/linux/amd-iommu.h | 8 +++---- 4 files changed, 29 insertions(+), 28 deletions(-) diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h index 37b94f484ef3..263f4df429d8 100644 --- a/arch/x86/include/asm/irq_remapping.h +++ b/arch/x86/include/asm/irq_remapping.h @@ -35,7 +35,7 @@ struct amd_iommu_pi_data { u64 vapic_addr; /* Physical address of the vCPU's vAPIC. */ u32 ga_tag; u32 vector; /* Guest vector of the interrupt */ - int cpu; + int apicid; bool ga_log_intr; bool is_guest_mode; void *ir_data; diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 96ca39c0045f..5ac5ce4039a6 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -960,9 +960,9 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm, */ entry = svm->avic_physical_id_entry; if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK) { - pi_data.cpu = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK; + pi_data.apicid = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK; } else { - pi_data.cpu = -1; + pi_data.apicid = -1; pi_data.ga_log_intr = entry & AVIC_PHYSICAL_ID_ENTRY_GA_LOG_INTR; } @@ -1015,7 +1015,7 @@ enum avic_vcpu_action { AVIC_START_BLOCKING = BIT(1), }; -static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, +static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int apicid, enum avic_vcpu_action action) { bool ga_log_intr = (action & AVIC_START_BLOCKING); @@ -1035,9 +1035,9 @@ static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, void *data = irqfd->irq_bypass_data; if (!(action & AVIC_TOGGLE_ON_OFF)) - WARN_ON_ONCE(amd_iommu_update_ga(data, cpu, ga_log_intr)); - else if (cpu >= 0) - WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, cpu, ga_log_intr)); + WARN_ON_ONCE(amd_iommu_update_ga(data, apicid, ga_log_intr)); + else if (apicid >= 0) + WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, apicid, ga_log_intr)); else WARN_ON_ONCE(amd_iommu_deactivate_guest_mode(data)); } diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 41ee4ad1dcf8..26afedfbf0bc 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -4053,14 +4053,14 @@ static const struct irq_domain_ops amd_ir_domain_ops = { .deactivate = irq_remapping_deactivate, }; -static void __amd_iommu_update_ga(struct irte_ga *entry, int cpu, +static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid, bool ga_log_intr) { - if (cpu >= 0) { + if (apicid >= 0) { entry->lo.fields_vapic.destination = - APICID_TO_IRTE_DEST_LO(cpu); + APICID_TO_IRTE_DEST_LO(apicid); entry->hi.fields.destination = - APICID_TO_IRTE_DEST_HI(cpu); + APICID_TO_IRTE_DEST_HI(apicid); entry->lo.fields_vapic.is_run = true; entry->lo.fields_vapic.ga_log_intr = false; } else { @@ -4073,20 +4073,21 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int cpu, * Update the pCPU information for an IRTE that is configured to post IRQs to * a vCPU, without issuing an IOMMU invalidation for the IRTE. * - * If the vCPU is associated with a pCPU (@cpu >= 0), configure the Destination - * with the pCPU's APIC ID, set IsRun, and clear GALogIntr. If the vCPU isn't - * associated with a pCPU (@cpu < 0), clear IsRun and set/clear GALogIntr based - * on input from the caller (e.g. KVM only requests GALogIntr when the vCPU is - * blocking and requires a notification wake event). I.e. treat vCPUs that are - * associated with a pCPU as running. This API is intended to be used when a - * vCPU is scheduled in/out (or stops running for any reason), to do a fast - * update of IsRun, GALogIntr, and (conditionally) Destination. + * If the vCPU is associated with a pCPU (@apicid >= 0), configure the + * Destination with the pCPU's APIC ID, set IsRun, and clear GALogIntr. If the + * vCPU isn't associated with a pCPU (@apicid < 0), clear IsRun and set/clear + * GALogIntr based on input from the caller (e.g. KVM only requests GALogIntr + * when the vCPU is blocking and requires a notification wake event). I.e. + * treat vCPUs that are associated with a pCPU as running. This API is + * intended to be used when a vCPU is scheduled in/out (or stops running for + * any reason), to do a fast update of IsRun, GALogIntr, and (conditionally) + * Destination. * * Per the IOMMU spec, the Destination, IsRun, and GATag fields are not cached * and thus don't require an invalidation to ensure the IOMMU consumes fresh * information. */ -int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr) +int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr) { struct amd_ir_data *ir_data = (struct amd_ir_data *)data; struct irte_ga *entry = (struct irte_ga *) ir_data->entry; @@ -4100,14 +4101,14 @@ int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr) if (!ir_data->iommu) return -ENODEV; - __amd_iommu_update_ga(entry, cpu, ga_log_intr); + __amd_iommu_update_ga(entry, apicid, ga_log_intr); return __modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid, ir_data->irq_2_irte.index, entry); } EXPORT_SYMBOL(amd_iommu_update_ga); -int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr) +int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr) { struct amd_ir_data *ir_data = (struct amd_ir_data *)data; struct irte_ga *entry = (struct irte_ga *) ir_data->entry; @@ -4130,7 +4131,7 @@ int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr) entry->hi.fields.vector = ir_data->ga_vector; entry->lo.fields_vapic.ga_tag = ir_data->ga_tag; - __amd_iommu_update_ga(entry, cpu, ga_log_intr); + __amd_iommu_update_ga(entry, apicid, ga_log_intr); return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid, ir_data->irq_2_irte.index, entry); @@ -4201,7 +4202,7 @@ static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *info) ir_data->ga_vector = pi_data->vector; ir_data->ga_tag = pi_data->ga_tag; if (pi_data->is_guest_mode) - ret = amd_iommu_activate_guest_mode(ir_data, pi_data->cpu, + ret = amd_iommu_activate_guest_mode(ir_data, pi_data->apicid, pi_data->ga_log_intr); else ret = amd_iommu_deactivate_guest_mode(ir_data); diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h index 5c9dcf720f84..a467e3e90acc 100644 --- a/include/linux/amd-iommu.h +++ b/include/linux/amd-iommu.h @@ -30,8 +30,8 @@ static inline void amd_iommu_detect(void) { } /* IOMMU AVIC Function */ extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32)); -extern int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr); -extern int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr); +extern int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr); +extern int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr); extern int amd_iommu_deactivate_guest_mode(void *data); #else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */ @@ -42,12 +42,12 @@ amd_iommu_register_ga_log_notifier(int (*notifier)(u32)) return 0; } -static inline int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr) +static inline int amd_iommu_update_ga(void *data, int apicid, bool ga_log_intr) { return 0; } -static inline int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr) +static inline int amd_iommu_activate_guest_mode(void *data, int apicid, bool ga_log_intr) { return 0; } -- 2.34.1