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No flash declares these protocols today, so the path has never been used. This series makes the 1S-xD-xD protocols usable and enables the first user(MX66L1G45G). [1]: https://lore.kernel.org/all/20261028121100.79667-1-changhuang.liang@starfivetech.com/ This is a split version of the previously sent series [1]. The SPI controller related patches in the original series were applied, so the remaining MTD-related patches were separated out into a new series. Changes since previous submission: - Move the 1_4_4_DTR read command support into the .post_bfpt hook. - Drop the now-unnecessary SPI_NOR_4B_OPCODES fixup flag. Changhuang Liang (3): mtd: spi-nor: Support mixed 1S-xD-xD DTR protocols in spi_nor_spimem_setup_op() mtd: spi-nor: debugfs: Correct DTR protocol names for 1S-xD-xD modes mtd: spi-nor: macronix: Add 1-4-4 DTR read support for MX66L1G45G drivers/mtd/spi-nor/core.c | 23 ++++++++++------------- drivers/mtd/spi-nor/debugfs.c | 8 ++++---- drivers/mtd/spi-nor/macronix.c | 28 +++++++++++++++++++++++++++- 3 files changed, 41 insertions(+), 18 deletions(-) -- 2.25.1