Re: [PATCH v5 02/13] drm/bridge: tc358762: Improve SYSCTRL register defines

[Andreas Kemnade <andreas@kemnade.info>]

On Thu, 15 Oct 2026 14:15:53 +0300
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> wrote:

> Define SYSCTRL fields. No functional changes.
> 
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>

seems to match the previous constant and looks sane, so

Reviewed-by: Andreas Kemnade <andreas@kemnade.info>

> ---
>  drivers/gpu/drm/bridge/tc358762.c | 20 +++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c
> index 097d2f331a16..59c68432f8e1 100644
> --- a/drivers/gpu/drm/bridge/tc358762.c
> +++ b/drivers/gpu/drm/bridge/tc358762.c
> @@ -10,6 +10,7 @@
>   *  Eric Anholt <eric@anholt.net>
>   */
>  
> +#include <linux/bitfield.h>
>  #include <linux/delay.h>
>  #include <linux/gpio/consumer.h>
>  #include <linux/module.h>
> @@ -63,6 +64,19 @@
>  
>  /* System Controller Registers */
>  #define SYSCTRL			0x0464
> +#define SYSCTRL_DPIDATA_IO_MASK GENMASK_U32(1, 0)
> +#define SYSCTRL_DPIDATA_IO_1MA	0
> +#define SYSCTRL_DPIDATA_IO_2MA	1
> +#define SYSCTRL_DPIDATA_IO_3MA	2
> +#define SYSCTRL_DPIDATA_IO_4MA	3
> +#define SYSCTRL_DPISTB_IO_MASK	GENMASK_U32(3, 2)
> +#define SYSCTRL_DPISTB_IO_1MA	0
> +#define SYSCTRL_DPISTB_IO_2MA	1
> +#define SYSCTRL_DPISTB_IO_3MA	2
> +#define SYSCTRL_DPISTB_IO_4MA	3
> +#define SYSCTRL_PCLKDIV_MASK	GENMASK_U32(11, 8)
> +#define SYSCTRL_PCLKDIV_DIV_2	2
> +#define SYSCTRL_PCLKDIV_DIV_3	4
>  
>  #define LPX_PERIOD		3
>  
> @@ -136,7 +150,11 @@ static int tc358762_init(struct tc358762 *ctx)
>  
>  	tc358762_write(ctx, LCDCTRL, lcdctrl);
>  
> -	tc358762_write(ctx, SYSCTRL, 0x040f);
> +	tc358762_write(ctx, SYSCTRL,
> +		       FIELD_PREP(SYSCTRL_DPIDATA_IO_MASK, SYSCTRL_DPIDATA_IO_4MA) |
> +		       FIELD_PREP(SYSCTRL_DPISTB_IO_MASK, SYSCTRL_DPISTB_IO_4MA) |
> +		       FIELD_PREP(SYSCTRL_PCLKDIV_MASK, SYSCTRL_PCLKDIV_DIV_3));
> +
>  	msleep(100);
>  
>  	tc358762_write(ctx, PPI_STARTPPI, PPI_STARTPPI_STARTPPI);
>