From: Rosen Penev <rosenp@gmail.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Alban Bedel <albeu@free.fr>,
Antony Pavlov <antonynpavlov@gmail.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH v3 5/7] dt-bindings: clock: ath79: add the UART1 and PCIe PLL clocks
Date: Wed, 11 Nov 2026 13:57:27 -0800 [thread overview]
Message-ID: <20261111215729.10683-6-rosenp@gmail.com> (raw)
In-Reply-To: <20261111215729.10683-1-rosenp@gmail.com>
Add IDs for two more clocks:
The second, high speed UART of AR934x, which is compatible with the
qca,ar9330-uart one, can run from a 100 MHz clock instead of the
reference clock.
AR724x, AR934x, QCA953x, QCA955x and QCA956x have a PCIe PLL, which the
PCIe host controller nodes need to reference.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
include/dt-bindings/clock/ath79-clk.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/ath79-clk.h b/include/dt-bindings/clock/ath79-clk.h
index 27e31452544d..57d966ae9722 100644
--- a/include/dt-bindings/clock/ath79-clk.h
+++ b/include/dt-bindings/clock/ath79-clk.h
@@ -11,5 +11,7 @@
#define ATH79_CLK_AHB 2
#define ATH79_CLK_REF 3
#define ATH79_CLK_MDIO 4
+#define ATH79_CLK_UART1 5
+#define ATH79_CLK_PCIE 6
#endif /* __DT_BINDINGS_ATH79_CLK_H */
--
2.56.0
next prev parent reply other threads:[~2026-11-11 21:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-11 21:57 [PATCH v3 0/7] clk: add a driver for the ath79 PLL controller Rosen Penev
2026-11-11 21:57 ` [PATCH v3 1/7] MIPS: ath79: apply the QCA956x timer workaround in setup Rosen Penev
2026-11-11 21:57 ` [PATCH v3 2/7] MIPS: ath79: move the bootstrap reference clock to setup Rosen Penev
2026-11-11 21:57 ` [PATCH v3 3/7] MIPS: ath79: stop using ATH79_CLK_END Rosen Penev
2026-11-11 21:57 ` [PATCH v3 4/7] dt-bindings: clock: ath79: drop ATH79_CLK_END Rosen Penev
2026-11-11 21:57 ` Rosen Penev [this message]
2026-11-11 21:57 ` [PATCH v3 6/7] clk: add a driver for the Atheros/Qualcomm ath79 PLL controller Rosen Penev
2026-11-11 21:57 ` [PATCH v3 7/7] MIPS: ath79: remove the old clock code Rosen Penev
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261111215729.10683-6-rosenp@gmail.com \
--to=rosenp@gmail.com \
--cc=albeu@free.fr \
--cc=antonynpavlov@gmail.com \
--cc=bmasney+clk@redhat.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jbrunet+clk@baylibre.com \
--cc=krzk+dt@kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=tsbogend@alpha.franken.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®