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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: UCJiXcRLFyIEdJB2VIVx4z4UlC2cHPAhzWk8J+ou9KKJoP0CBjKPqbDLvBHyBya8VviueIpUgUP1/Jd9Dl9gk/X1yruHUVu7MQgYYKFVWCD7yOdp+2Z6twG5WmOxPwXqRvcjFVbECfVJr5LLpf+tuygorey8kcCALlgvv77gvoACnRbaIwci944zibjMIZ4P2CRX8wIRDxxnJc3UDDRKYTTVohmD75Xd3BQTjzy2YR9E4Ab6qacpfPNSfDtPUO1b87PKLQtlYg4/dNjKfSQMvo7H+jlUG945hRmesg/N2L5DFwZFKVeOHi17dH8o32bh9S6qo8qdEP8CJpTYwf14SvYvoQs4FGiH0h7AfH/8sfXy/7G+5mbNJKK7ggZzCFEkxa9ZlNhAMeDoUlyV9w8zRFA6ElyXRhOOSaUM2lKlooqHswB09FucShP6j1WvVTsH X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Nov 2026 22:34:07.8045 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbc5314e-d5d6-4d35-9196-08df4043e628 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE16.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8191 From: Peter Colberg Wrap pci_enable_sriov() and pci_disable_sriov() on Device for use by the SR-IOV callback tokens and their rollback guard. Keep these operations internal so drivers can only enable or disable VFs through the callback-scoped API introduced later in this series. Stub both helpers when CONFIG_PCI_IOV is disabled, so the SR-IOV API builds regardless and drivers need no configuration guards. Suggested-by: Danilo Krummrich Signed-off-by: Peter Colberg Signed-off-by: Zhi Wang Reviewed-by: Alexandre Courbot Signed-off-by: Simon Song --- rust/helpers/pci.c | 11 ++++++++++ rust/kernel/pci.rs | 1 + rust/kernel/pci/iov.rs | 48 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 60 insertions(+) create mode 100644 rust/kernel/pci/iov.rs diff --git a/rust/helpers/pci.c b/rust/helpers/pci.c index a8540f90b13c..a87b5a77efef 100644 --- a/rust/helpers/pci.c +++ b/rust/helpers/pci.c @@ -41,6 +41,17 @@ __rust_helper u32 rust_helper_pci_ext_cap_next(u32 header) } #ifndef CONFIG_PCI_IOV +__rust_helper int rust_helper_pci_enable_sriov(struct pci_dev *pdev, + int nr_virtfn) +{ + return pci_enable_sriov(pdev, nr_virtfn); +} + +__rust_helper void rust_helper_pci_disable_sriov(struct pci_dev *pdev) +{ + pci_disable_sriov(pdev); +} + __rust_helper unsigned int rust_helper_pci_sriov_get_totalvfs(struct pci_dev *pdev) { diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index 769d01d23429..8a4af261d1d4 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -36,6 +36,7 @@ mod cap; mod id; mod io; +mod iov; mod irq; pub use self::cap::{ diff --git a/rust/kernel/pci/iov.rs b/rust/kernel/pci/iov.rs new file mode 100644 index 000000000000..18e42b2d3965 --- /dev/null +++ b/rust/kernel/pci/iov.rs @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 + +//! Abstractions for PCI Single Root I/O Virtualization (SR-IOV) drivers. + +use super::Device; + +use crate::{ + bindings, + device, + error::to_result, + prelude::*, // +}; + +impl Device> { + /// Enable the Single Root I/O Virtualization (SR-IOV) capability for this device, + /// where `nr_virtfn` is number of Virtual Functions (VF) to enable. + #[inline] + #[expect(dead_code)] + pub(crate) fn enable_sriov(&self, nr_virtfn: u16) -> Result { + // SAFETY: + // - `self.as_raw` returns a valid pointer to a `struct pci_dev`. + // + // - `pci_enable_sriov()` checks that the enable operation is valid: + // - the device is a Physical Function (PF), + // - SR-IOV is currently disabled, and + // - `nr_virtfn` does not exceed the total number of supported VFs. + // + // - The `CoreInternal` device context inherits from the `Bound` device context, + // which guarantees that the PF device is bound to a driver. + to_result(unsafe { bindings::pci_enable_sriov(self.as_raw(), nr_virtfn.into()) }) + } + + /// Disable the Single Root I/O Virtualization (SR-IOV) capability for this device. + #[inline] + #[expect(dead_code)] + pub(crate) fn disable_sriov(&self) { + // SAFETY: + // - `self.as_raw` returns a valid pointer to a `struct pci_dev`. + // + // - `pci_disable_sriov()` checks that the disable operation is valid: + // - the device is a Physical Function (PF), and + // - SR-IOV is currently enabled. + // + // - The `CoreInternal` device context inherits from the `Bound` device context, + // which guarantees that the PF device is bound to a driver. + unsafe { bindings::pci_disable_sriov(self.as_raw()) }; + } +} -- 2.43.7