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Wed, 11 Nov 2026 15:44:01 -0800 (PST) Received: from d.home.yangfl.dn42 ([2a09:bac1:76a0:28::1d2:6e]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b197c74bf3sm1328794a91.10.2026.11.11.15.43.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Nov 2026 15:44:01 -0800 (PST) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-kernel@vger.kernel.org Subject: [PATCH net 3/3] net: dsa: motorcomm: Use VID 0 as the unaware PVID Date: Thu, 12 Nov 2026 07:41:06 +0800 Message-ID: <20261111234110.1449602-4-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261111234110.1449602-1-mmyangfl@gmail.com> References: <20261111234110.1449602-1-mmyangfl@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The hardware classifies untagged and priority-tagged frames to the port's PVID before the VLAN table lookup, and the FDB lookup key equals the classified VID (measured on YT9215S). The driver assigned PVID 4095 to the VLAN-unaware ports, while switchdev reports the bridge's FDB entries with VID 0. These entries were then installed under FID 0 and could never be hit by the hardware lookups. Dynamic entries learnt under VID 4095, if any, took effect instead. Lift the restriction on VLAN 0, and use it as the PVID of the VLAN-unaware ports instead. The standalone default of 4095 stays, so mislearnt entries, if any, would not pollute the bridge FDB. Fixes: 186623f4aa72 ("net: dsa: yt921x: Add support for Motorcomm YT921x") Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/chip.c index a2be819ccbed..376f16466cdd 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -79,7 +79,6 @@ static const struct yt921x_info yt921x_infos[] = { {} }; -#define YT921X_VID_UNWARE 4095 struct yt921x_reg_mdio { struct mii_bus *bus; @@ -962,7 +961,7 @@ yt921x_vlan_filtering(struct yt921x_priv *priv, int port, bool vlan_filtering) bdev = dsa_port_bridge_dev_get(dp); if (!bdev || !vlan_filtering) - pvid = YT921X_VID_UNWARE; + pvid = 0; else br_vlan_get_pvid(bdev, &pvid); res = yt921x_port_set_pvid(priv, port, pvid); @@ -1030,8 +1029,7 @@ yt921x_pvid_clear(struct yt921x_priv *priv, int port) vlan_filtering = dsa_port_is_vlan_filtering(dp); - res = yt921x_port_set_pvid(priv, port, - vlan_filtering ? 0 : YT921X_VID_UNWARE); + res = yt921x_port_set_pvid(priv, port, 0); if (res) return res; @@ -1188,7 +1186,7 @@ static int yt921x_userport_standalone(struct yt921x_priv *priv, int port) /* Unrelated since learning is off and all packets are trapped; * set it anyway */ - res = yt921x_port_set_pvid(priv, port, YT921X_VID_UNWARE); + res = yt921x_port_set_pvid(priv, port, 4095); if (res) return res; @@ -2270,7 +2268,6 @@ static int yt921x_chip_setup_dsa(struct yt921x_priv *priv) { struct dsa_switch *ds = &priv->ds; unsigned long cpu_ports_mask; - u32 ctrls[2]; u32 ctrl; int port; int res; @@ -2328,15 +2325,6 @@ static int yt921x_chip_setup_dsa(struct yt921x_priv *priv) if (res) return res; - /* Tagged VID 0 should be treated as untagged, which confuses the - * hardware a lot - */ - ctrls[0] = YT921X_VLAN_CTRLa_LEARN_DIS | YT921X_VLAN_CTRLa_PORTS_M; - ctrls[1] = 0; - res = yt921x_reg64_write(priv, YT921X_VLANn_CTRL(0), ctrls); - if (res) - return res; - return 0; } -- 2.53.0