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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3751fe2ff5dsm21856793eec.5.2026.11.11.20.36.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Nov 2026 20:36:51 -0800 (PST) From: Varadarajan Narayanan Date: Thu, 12 Nov 2026 10:06:25 +0530 Subject: [PATCH v9 06/11] arm64: dts: qcom: ipq5210: Add ICE support to SDHCI X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261112-08-dts-v9-6-c34de4f78fbb@oss.qualcomm.com> References: <20261112-08-dts-v9-0-c34de4f78fbb@oss.qualcomm.com> In-Reply-To: <20261112-08-dts-v9-0-c34de4f78fbb@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Abel Vesa Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan X-Mailer: b4 0.14.3 X-Proofpoint-ORIG-GUID: wfoYHwX2Y_ElcnANxKygWSumoixYOWd1 X-Authority-Analysis: v=2.4 cv=OYANnRTY c=1 sm=1 tr=0 ts=6af54265 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=oTQqOnWIMzOobJ4mAXcA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-GUID: wfoYHwX2Y_ElcnANxKygWSumoixYOWd1 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTEyMDAxOCBTYWx0ZWRfX6aIM0Zu/bWmK GhyrUhNw5+UT0UHwCre5/2dRWIPT5xD+k2aPBPA2M1aDcaX+KKBILZkkZLD7ue6zBc+ZiIaDjiu DHLtPktIK6a4hv+O7BWiVB2BtxyESoWUVSDPQPJt6arjAQfYVDmJWGQcOAV4lVJ0Ob1kgRfPbiM m892iZ00vlCcJg9QiuY+S0h7epdqOu2omOOKfxrGwuw6WmPRHqfayj/+icJGPCW9uETiyKEuJu5 4VpPJ0sNkUNBxWjL+CEADnfbriPdiJY+s5i0GubEyBP3fQvnWCjD+qb0WdQrHkYi4piMo1zgNkf 2F1hZuZKfHxNLXITh4wVYoy5H5Dg1B856yuTLT5NbSVNOOCyjcq4QkwpJFClV2+IIRBSE4uh9oC HtJ3NSqxPHySpem0iqf2RXWtgG4mrCvhi3RqAIkXjv2x8H73fGRpqz1zlllSLzKiPqTI5w1DGbB 2jWMPejxc3Tzhaf7bZw== X-Proofpoint-Spam-Info: AW1haW4tMjYxMTEyMDAxOCBTYWx0ZWRfX5TyAZfeFXSE1 n1TN4LisfW8fbovwlTNNVA0Jk8avuzWvJaEkhVFSXgBd/j+DsxwSt1VdlFtrCdXTZGKWl06BCar sbfKGXS0gTarCFCieNLHUsQXlq447yQ= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-12_01,2026-11-11_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611120018 Describe the SDHCI ICE register region and clock, and enable CQE support for the IPQ5210 SDHCI controller. Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts | 4 ++++ arch/arm64/boot/dts/qcom/ipq5210.dtsi | 26 ++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts b/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts index 43cdb981a4ba..aa8b37d837ec 100644 --- a/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts +++ b/arch/arm64/boot/dts/qcom/ipq5210-rdp504.dts @@ -22,3 +22,7 @@ &sdhc { status = "okay"; }; + +&sdhc_ice { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq5210.dtsi b/arch/arm64/boot/dts/qcom/ipq5210.dtsi index f3d688fded80..267255d2980a 100644 --- a/arch/arm64/boot/dts/qcom/ipq5210.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5210.dtsi @@ -164,6 +164,14 @@ opp-1416000000 { }; }; + sdhc_opp_table_300mhz: opp-table-300mhz { + compatible = "operating-points-v2"; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + }; + }; + pmu { compatible = "arm,cortex-a53-pmu"; interrupts = ; @@ -456,7 +464,25 @@ sdhc: mmc@7804000 { clock-names = "iface", "core", "xo"; + + qcom,ice = <&sdhc_ice>; + non-removable; + operating-points-v2 = <&sdhc_opp_table_300mhz>; + supports-cqe; + + status = "disabled"; + }; + + sdhc_ice: crypto@7808000 { + compatible = "qcom,ipq5210-inline-crypto-engine", + "qcom,inline-crypto-engine"; + reg = <0x0 0x07808000 0x0 0x2000>; + + clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, + <&gcc GCC_SDCC1_AHB_CLK>; + clock-names = "core", + "iface"; status = "disabled"; }; -- 2.34.1