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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3751fe2ff5dsm21856793eec.5.2026.11.11.20.36.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Nov 2026 20:36:59 -0800 (PST) From: Varadarajan Narayanan Date: Thu, 12 Nov 2026 10:06:27 +0530 Subject: [PATCH v9 08/11] arm64: dts: qcom: ipq5210: Enable the PWM block X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261112-08-dts-v9-8-c34de4f78fbb@oss.qualcomm.com> References: <20261112-08-dts-v9-0-c34de4f78fbb@oss.qualcomm.com> In-Reply-To: <20261112-08-dts-v9-0-c34de4f78fbb@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Abel Vesa Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan X-Mailer: b4 0.14.3 X-Authority-Analysis: v=2.4 cv=KsnYSmWN c=1 sm=1 tr=0 ts=6af5426d cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=Z1SsOzVGKYioKmY9djYA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-GUID: VJaLeQE9UJhVorT3d5SDxqsuXcZcXPYO X-Proofpoint-ORIG-GUID: VJaLeQE9UJhVorT3d5SDxqsuXcZcXPYO X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTEyMDAxOCBTYWx0ZWRfX1iO/mytC1ou3 dShw9vKWBRAsDkSQM7aW+4mwg2RsuHmDrfykOEoC1D4WWzdIV67liuHIp9ZtfU+YS2/nJy4BaxZ rhhV4j89RHrGCSJtBwGpNwge3DuhRSZr5oX2WxBotZS/M2kFwa1SHdunNczx9WfoLC2I47IMHhs /9pXIfKuRRA6no0lPXPFo5zrsgyAgL1ItJQUPmSFNKn16Qkkue6QuBvn0J6nkup0J6ftBE9vAEc 8pPOo2do92lmIIYr2rcUvl40IPUKfY6CJOd26RLDBvDck+EzJMu0PnMDTDoF+raIVceJktq8AMl JeBy/UV0ZstAKdnjnolYyV19RAPWKBLEHDaz5PdlzIhLcQ8kxl1hNsYLmDXF7fCXmqPSV+BptVI 8ftkSbgzW2jfXQHFPyZS2S29jvU4muWKN0/BN5lhPHlT1XyZKgMUeY3gUBZx+HY73hXY1M1xtTa /2Iig8LXfcUeVPF8UCw== X-Proofpoint-Spam-Info: AW1haW4tMjYxMTEyMDAxOCBTYWx0ZWRfX65vDHlHpDshn ig8ISTKPZ64Vv+lF5waY5ri5a4x55KQ+a112ehEo9qVAB5MasMeAH+is93NAu4vw2rre3QATnQ3 n3f674fjXxbtcde6HLGqJlxrD3btEvg= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-12_01,2026-11-11_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 bulkscore=0 adultscore=0 malwarescore=0 spamscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611120018 Describe and enable the PWM block on IPQ5210. Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/qcom/ipq5210.dtsi | 10 ++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi b/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi index 02fb76283f7f..87a7e625a2a4 100644 --- a/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi @@ -89,6 +89,11 @@ &pcie1_port0 { reset-gpios = <&tlmm 29 GPIO_ACTIVE_LOW>; }; +&pwm { + pinctrl-0 = <&pwm_default_state>; + pinctrl-names = "default"; +}; + &qpic_nand { pinctrl-0 = <&qpic_snand_default_state>; pinctrl-names = "default"; @@ -167,6 +172,13 @@ pcie0_default_state: pcie0-default-state { bias-pull-down; }; + pwm_default_state: pwm-default-state { + pins = "gpio11"; + function = "pwm0"; + drive-strength = <6>; + bias-pull-down; + }; + qpic_snand_default_state: qpic-snand-default-state { data-pins { pins = "gpio0", "gpio1", "gpio2", "gpio3"; diff --git a/arch/arm64/boot/dts/qcom/ipq5210.dtsi b/arch/arm64/boot/dts/qcom/ipq5210.dtsi index aa1045f20ed2..4cb9f399d480 100644 --- a/arch/arm64/boot/dts/qcom/ipq5210.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5210.dtsi @@ -431,6 +431,16 @@ tcsr: syscon@1937000 { reg = <0x0 0x01937000 0x0 0x2b000>; }; + pwm: pwm@1941010 { + compatible = "qcom,ipq5210-pwm", "qcom,ipq6018-pwm"; + reg = <0x0 0x01941010 0x0 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <3>; + status = "okay"; + }; + qupv3: geniqup@1ac0000 { compatible = "qcom,geni-se-qup"; reg = <0x0 0x01ac0000 0x0 0x2000>; -- 2.34.1