From: Arun Iyengar via B4 Relay <devnull+aiyengar1990.gmail.com@kernel.org>
To: "Sandy Huang" <hjc@rock-chips.com>,
"Heiko Stübner" <heiko@sntech.de>, "Andy Yan" <andyshrk@163.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Sascha Hauer" <s.hauer@pengutronix.de>
Cc: Piotr Zalewski <pZ010001011111@proton.me>,
Chaoyi Chen <chaoyi.chen@rock-chips.com>,
dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Arun Iyengar <aiyengar1990@gmail.com>,
stable@vger.kernel.org
Subject: [PATCH v2 1/9] drm/rockchip: vop2: Take the UV plane address from the second GEM object
Date: Thu, 12 Nov 2026 08:33:05 +0000 [thread overview]
Message-ID: <20261112-vop2-fixes-v2-1-8218c1cf8ac8@gmail.com> (raw)
In-Reply-To: <20261112-vop2-fixes-v2-0-8218c1cf8ac8@gmail.com>
From: Arun Iyengar <aiyengar1990@gmail.com>
vop2_plane_atomic_update() computes the address of the chroma plane of a
multi-planar YUV framebuffer from fb->obj[0], the object of the luma
plane, plus the offset of the chroma plane. A framebuffer may have its
planes in different GEM objects though (DRM_IOCTL_MODE_ADDFB2 with two
handles, as with an NV12M buffer from a V4L2 decoder imported as two
DMA-BUFs). The window then fetches the chroma plane from the luma buffer,
at an offset meant for another buffer, which shows a wrong picture or
reads past the end of the luma buffer.
Use fb->obj[1] for the chroma plane. Single plane YUV formats like
DRM_FORMAT_YUV420_8BIT have no second object and keep using fb->obj[0].
This is also what the vendor kernel does.
Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://lore.kernel.org/all/sashiko-outbox-206550@kernel.org/
Cc: stable@vger.kernel.org
Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
---
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 76d151b8bc52..ea8d837d661f 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -1369,7 +1369,9 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
if ((pstate->rotation & DRM_MODE_REFLECT_Y) && !afbc_en)
offset += fb->pitches[1] * ((pstate->src_h >> 16) - 2) / vsub;
- rk_obj = to_rockchip_obj(fb->obj[0]);
+ /* Single plane formats like YUV420_8BIT have no second object */
+ if (fb->format->num_planes > 1)
+ rk_obj = to_rockchip_obj(fb->obj[1]);
uv_mst = rk_obj->dma_addr + offset + fb->offsets[1];
}
--
2.55.0
next prev parent reply other threads:[~2026-11-12 8:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-12 8:33 [PATCH v2 0/9] drm/rockchip: vop2: RK3588 clocking, sync polarity, AXI port and window fixes Arun Iyengar via B4 Relay
2026-11-12 8:33 ` Arun Iyengar via B4 Relay [this message]
2026-11-12 8:33 ` [PATCH v2 2/9] drm/rockchip: vop2: Don't use uninitialised dividers on RK3588 Arun Iyengar via B4 Relay
2026-11-12 8:33 ` [PATCH v2 3/9] drm/rockchip: vop2: Fix the HDMI sync polarity " Arun Iyengar via B4 Relay
2026-11-12 8:33 ` [PATCH v2 4/9] drm/rockchip: vop2: Don't accept AFBC YTR for RGB565 " Arun Iyengar via B4 Relay
2026-11-12 8:33 ` [PATCH v2 5/9] drm/rockchip: vop2: Balance window fetches across both AXI ports " Arun Iyengar via B4 Relay
2026-11-12 8:33 ` [PATCH v2 6/9] drm/rockchip: vop2: Report POST_BUF_EMPTY at most once per frame Arun Iyengar via B4 Relay
2026-11-12 8:33 ` [PATCH v2 7/9] drm/rockchip: vop2: Find the first mixer of a video port with Esmart3 too Arun Iyengar via B4 Relay
2026-11-12 8:33 ` [PATCH v2 8/9] drm/rockchip: vop2: Keep the other LUT_PORT_SEL fields on gamma LUT updates Arun Iyengar via B4 Relay
2026-11-12 8:33 ` [PATCH v2 9/9] drm/rockchip: vop2: Fix the AFBC offsets of a source that starts inside a superblock Arun Iyengar via B4 Relay
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