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Wed, 11 Nov 2026 17:20:53 -0800 From: Johnny Liu To: Johnny Liu CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , "Prashant Gaikwad" , Stephen Boyd , Brian Masney , Jerome Brunet , "Douglas Anderson" , Aniruddha Rao , , , , Subject: Re: [PATCH v3 0/4] Add Tegra238 BPMP support and fix stale EMC clock rate Date: Thu, 12 Nov 2026 01:20:14 +0000 Message-ID: <20261112012024.3947256-1-johnliu@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261102121202.2431928-1-johnliu@nvidia.com> References: X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DSM2EPF00000011:EE_|SJ2PR12MB7917:EE_ X-MS-Office365-Filtering-Correlation-Id: a8e4446f-2dcd-44c6-607f-08df405b3e26 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|30052699003|36860700016|7416014|376014|82310400026|23010399003|56012099006|11063799006|22082099003|18002099003|10067099003|261009223027099003|261026140227099003|261022105027099003|261021123027099003|261021121427099003|261102123227099003|261028144727099003|261026121527099003|13003099007; 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Just wondering if you’ve had a chance to look at this patch/series yet. Thanks, Johnny On 2026/11/02 12:11, Johnny Liu wrote: > EMC clock scaling is handled by the BPMP firmware without kernel > involvement, so clk_get_rate() on the EMC clock can return a stale value > cached by the common clock framework. This series makes the EMC clock > rate uncached on Tegra234, Tegra238 and Tegra264, and adds the pieces > needed to identify the EMC clock on each of these chips. > > The EMC clock ID differs per chip (TEGRA234_CLK_EMC=31, > TEGRA238_CLK_EMC=43, TEGRA264_CLK_EMC=290), while the > "nvidia,tegra186-bpmp" fallback compatible and the tegra186_soc data are > shared across several chips. To avoid detecting the chip at runtime, the > EMC clock ID is carried in per-SoC BPMP data selected by the device tree > compatible. > > Patch 1 adds the "nvidia,tegra238-bpmp" compatible to the binding, > together with the Tegra238 clock ID header. Patch 2 adds an emc_clk_id > field to struct tegra_bpmp_soc, together with dedicated SoC data for > Tegra234 and Tegra264 built on a common TEGRA186_BPMP_SOC_COMMON > initializer. Patch 3 adds Tegra238 support to the BPMP driver, including > its own SoC data and EMC clock ID. Patch 4 then sets > CLK_GET_RATE_NOCACHE on the clock matching that ID, so that the common > clock framework forwards rate queries to the BPMP instead of returning a > stale cached rate. > > The series touches both the clock and the firmware code. Patch 4 depends > on patch 2, and patch 3 depends on patches 1 and 2, so I would suggest > taking the whole series through the Tegra tree with an Acked-by from the > clock maintainers. > > Changes in v3: > - Move the TEGRA186_BPMP_SOC_COMMON refactoring out of the Tegra238 > support patch and into the "Add per-SoC EMC clock ID" patch, as the > refactoring only makes sense together with the per-SoC emc_clk_id. > - Keep all Tegra238 specific changes (Makefile, CONFIG_ARCH_TEGRA_238_SOC > guards, clock ID header include, tegra238_soc data and compatible match) > in a single "Add Tegra238 support" patch, and reorder it after the > per-SoC EMC clock ID patch. > - Reword the "Add per-SoC EMC clock ID" commit message to describe the > intended use of emc_clk_id: the BPMP clock provider sets > CLK_GET_RATE_NOCACHE on that clock, as it is completely managed by the > firmware and the common clock framework must pass rate queries through > to get the latest rate. > - No changes to patches 1 and 4 apart from the patch numbering. > > Changes in v2: > - Squash "dt-bindings: clock: Add Tegra238 BPMP clock IDs" into > "dt-bindings: firmware: tegra186-bpmp: Add Tegra238 compatible". > - Reword the binding commit message to state that the Tegra238 SoC is > fully compatible with the Tegra186 BPMP. > > v2: https://lore.kernel.org/all/20261028155000.1205739-1-johnliu@nvidia.com/ > v1: https://lore.kernel.org/all/20261028084900.1047287-1-johnliu@nvidia.com/ > > Johnny Liu (4): > dt-bindings: firmware: tegra186-bpmp: Add Tegra238 BPMP > firmware: tegra: bpmp: Add per-SoC EMC clock ID > firmware: tegra: bpmp: Add Tegra238 support > clk: tegra: bpmp: Do not cache the EMC clock rate > > .../firmware/nvidia,tegra186-bpmp.yaml | 1 + > drivers/clk/tegra/clk-bpmp.c | 3 + > drivers/firmware/tegra/Makefile | 1 + > drivers/firmware/tegra/bpmp.c | 61 ++-- > include/dt-bindings/clock/nvidia,tegra238.h | 279 ++++++++++++++++++ > include/soc/tegra/bpmp.h | 1 + > 6 files changed, 329 insertions(+), 17 deletions(-) > create mode 100644 include/dt-bindings/clock/nvidia,tegra238.h > > -- > 2.43.0 >