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d="scan'208";a="33343637" Received: from ip-10-5-9-48.us-west-2.compute.internal (HELO smtpout.naws.us-west-2.prod.farcaster.email.amazon.dev) ([10.5.9.48]) by internal-pdx-out-001.esa.us-west-2.outbound.mail-perimeter.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2026 16:45:22 +0000 Received: from EX19MTAUWB002.ant.amazon.com [205.251.233.48:13743] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.12.127:2525] with esmtp (Farcaster) id 8c8c2008-3ce1-4ff7-9460-e60988eeef12; Thu, 12 Nov 2026 16:45:21 +0000 (UTC) X-Farcaster-Flow-ID: 8c8c2008-3ce1-4ff7-9460-e60988eeef12 Received: from EX19D001UWA001.ant.amazon.com (10.13.138.214) by EX19MTAUWB002.ant.amazon.com (10.250.64.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.2562.56; Thu, 12 Nov 2026 16:45:21 +0000 Received: from dev-dsk-surenkj-2b-416930d2.us-west-2.amazon.com (10.169.26.94) by EX19D001UWA001.ant.amazon.com (10.13.138.214) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.2562.56; Thu, 12 Nov 2026 16:45:21 +0000 From: Surendran Kanagaraj To: Jarkko Sakkinen , Peter Huewe CC: Jason Gunthorpe , , , Jonathan Corbet , , Jonathan McDowell , "Breno Leitao" , , Alexander Graf , Gunnar Kudrjavets , Josh Levinson Subject: [RFC PATCH v3 7/8] tpm: Show timeouts and durations for TPM 2.0 chips Date: Thu, 12 Nov 2026 16:45:06 +0000 Message-ID: <20261112164506.83817-1-surenkj@amazon.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261112163846.97654-1-surenkj@amazon.com> References: <20261112163846.97654-1-surenkj@amazon.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: EX19D031UWA004.ant.amazon.com (10.13.139.19) To EX19D001UWA001.ant.amazon.com (10.13.138.214) The timeouts and durations files exist only for TPM 1.x chips, so a TPM 2.0 chip exposes none of its wait limits, even when tpm.limits= or a driver's ->adjust_limits() hook changes them. Both files read the limits table, so add them to the TPM 2.0 attributes too. A TPM 2.0 chip reports none of these values, so for it "[adjusted]" means that tpm.limits= or a driver's ->adjust_limits() hook set one of the shown values, or that validation changed one. TPM 2.0 chips get no device/ links, so the files are /sys/class/tpm/tpmX/timeouts and durations. Signed-off-by: Surendran Kanagaraj --- drivers/char/tpm/tpm-sysfs.c | 2 ++ drivers/char/tpm/tpm2-cmd.c | 17 +++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/char/tpm/tpm-sysfs.c b/drivers/char/tpm/tpm-sysfs.c index b289a7f6f085..6bfc366fa120 100644 --- a/drivers/char/tpm/tpm-sysfs.c +++ b/drivers/char/tpm/tpm-sysfs.c @@ -340,6 +340,8 @@ static struct attribute *tpm1_dev_attrs[] = { static struct attribute *tpm2_dev_attrs[] = { &dev_attr_tpm_version_major.attr, + &dev_attr_durations.attr, + &dev_attr_timeouts.attr, #ifdef CONFIG_TCG_TPM2_HMAC &dev_attr_null_name.attr, #endif diff --git a/drivers/char/tpm/tpm2-cmd.c b/drivers/char/tpm/tpm2-cmd.c index 629caaeffa17..8cc1a262d668 100644 --- a/drivers/char/tpm/tpm2-cmd.c +++ b/drivers/char/tpm/tpm2-cmd.c @@ -41,9 +41,26 @@ int tpm2_find_hash_alg(unsigned int crypto_id) } EXPORT_SYMBOL_GPL(tpm2_find_hash_alg); +static bool tpm2_limits_adjusted(struct tpm_chip *chip, unsigned long mask) +{ + const struct tpm_limit_entry *e = chip->limits.entry; + int limit; + + for_each_set_bit(limit, &mask, TPM_NR_LIMITS) { + if (e[limit].src != TPM_LSRC_DEFAULT || + e[limit].flags & TPM_LF_CLAMPED) + return true; + } + + return false; +} + int tpm2_get_timeouts(struct tpm_chip *chip) { tpm_limits_update(chip, NULL); + chip->timeout_adjusted = tpm2_limits_adjusted(chip, TPM_LIMIT_INTF_MASK); + chip->duration_adjusted = + tpm2_limits_adjusted(chip, TPM1_LIMIT_DURATION_MASK); chip->flags |= TPM_CHIP_FLAG_HAVE_TIMEOUTS; return 0; } -- 2.47.3