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AL+hErGJLWbC5erTELufk94snsFKIvHhJaZetBY/DcFWQvLaoEazbRBS/9LS/ys0Yd2F5l4yuXglPkqZNooAEIc=@vger.kernel.org X-Gm-Message-State: APuU4Z+zwf8spnfFVuL0ooZkgwYiVFoaYTdaSKve9DO7OZPz4OPyg4Rh LpSPuQtkNaxNikAw9lzOWvAhnqHQgYY3nv7WpUDg5fLFFCEwVUWasj5uyoR77fvJUIzM3JNTYa5 pyMbP9Tch+wl7tA== X-Received: from ilej14-n1.prod.google.com ([2002:a05:6e02:620e:10b0:518:96aa:6d6a]) (user=jmattson job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6870:1b08:b0:4ad:5ca8:dbf7 with SMTP id 586e51a60fabf-4afded4d142mr577391fac.0.1794510121626; Thu, 12 Nov 2026 11:02:01 -0800 (PST) Date: Thu, 12 Nov 2026 11:01:58 -0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list Mime-Version: 1.0 X-Mailer: git-send-email 2.56.1.703.gf848ed807c-goog Message-ID: <20261112190158.103091-1-jmattson@google.com> Subject: [PATCH] KVM: nSVM: Add CET shadow stack MSRs to merge_msrs[] From: Jim Mattson To: Sean Christopherson , Paolo Bonzini Cc: Yosry Ahmed , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Jim Mattson Content-Type: text/plain; charset="UTF-8" When shadow stack is enabled for a vCPU, svm_recalc_msr_intercepts() disables interception of MSR_IA32_U_CET, MSR_IA32_S_CET, and MSR_IA32_PL{0..3}_SSP in vmcb01's MSRPM. However, because these MSRs are missing from merge_msrs[] in nested_svm_init_msrpm_merge_offsets(), their MSRPM bits are never merged into vmcb02's MSRPM, and L0 continues to intercept L2 accesses to them even when L1 disables interception. Add the CET shadow stack MSRs to merge_msrs[] and bump the size of nested_svm_msrpm_merge_offsets[] to accommodate their MSRPM chunk offset. Fixes: 38c46bdbf998 ("KVM: SVM: Pass through shadow stack MSRs as appropriate") Signed-off-by: Jim Mattson --- arch/x86/kvm/svm/nested.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c index 6298160458bc..1299fdadeb73 100644 --- a/arch/x86/kvm/svm/nested.c +++ b/arch/x86/kvm/svm/nested.c @@ -209,7 +209,7 @@ void nested_vmcb02_recalc_intercepts(struct vcpu_svm *svm) * Hardcode the capacity of the array based on the maximum number of _offsets_. * MSRs are batched together, so there are fewer offsets than MSRs. */ -static int nested_svm_msrpm_merge_offsets[10] __ro_after_init; +static int nested_svm_msrpm_merge_offsets[11] __ro_after_init; static int nested_svm_nr_msrpm_merge_offsets __ro_after_init; typedef unsigned long nsvm_msrpm_merge_t; @@ -238,6 +238,13 @@ int __init nested_svm_init_msrpm_merge_offsets(void) MSR_IA32_LASTINTFROMIP, MSR_IA32_LASTINTTOIP, + MSR_IA32_U_CET, + MSR_IA32_S_CET, + MSR_IA32_PL0_SSP, + MSR_IA32_PL1_SSP, + MSR_IA32_PL2_SSP, + MSR_IA32_PL3_SSP, + MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, -- 2.56.1.703.gf848ed807c-goog