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charset="utf-8" Message-Id: <20261113-hantro-robust-v3-12-82383c722ad2@gmail.com> References: <20261113-hantro-robust-v3-0-82383c722ad2@gmail.com> In-Reply-To: <20261113-hantro-robust-v3-0-82383c722ad2@gmail.com> To: Nicolas Dufresne , Benjamin Gaignard , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Nicolas Frattaroli , Andrzej Pietrasiewicz , Ezequiel Garcia , Hans Verkuil , Jernej Skrabec , "Joerg Roedel (AMD)" , Will Deacon , Robin Murphy Cc: linux-media@vger.kernel.org, iommu@lists.linux.dev, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sergei Khomenkov , Tharit Tangkijwanichakul , Sascha Hauer , Arun Iyengar X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1794588032; l=991; i=aiyengar1990@gmail.com; s=20261110; h=from:subject:message-id; bh=N909YZvJDjc6Eq9/44zn9avdFUylGlgxFkCrBk5+cUM=; b=BQaN2uqxim4dpFhP/YfDh38Y5VbQnw/qqCKpdYq505D02a2a7pNhN8nd1rWuZzk6Z/6s7djyT 2zG3b+iEGYwDzl3rfH1HhcujKURdiCZ04KKgu5HoqY+GBRm4100xBmA X-Developer-Key: i=aiyengar1990@gmail.com; a=ed25519; pk=zXpRgUTrhaFe6jLyPqbBy3ccfkj04w0g2690Wv3mg+0= X-Endpoint-Received: by B4 Relay for aiyengar1990@gmail.com/20261110 with auth_id=1480 X-Original-From: Arun Iyengar Reply-To: aiyengar1990@gmail.com Content-Transfer-Encoding: 7bit From: Arun Iyengar The AV1 IOMMU shares the four AV1 resets with the decoder. Describe them, so that its driver deasserts them before using its registers. This needs the decoder to get them as released controls ("media: verisilicon: Acquire the reset lines only while using them"). Signed-off-by: Arun Iyengar --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi index 227465d446a2..96898fefe840 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1491,6 +1491,8 @@ av1d_mmu: iommu@fdca0000 { clock-names = "core", "iface"; #iommu-cells = <0>; power-domains = <&power RK3588_PD_AV1>; + resets = <&cru SRST_A_AV1>, <&cru SRST_A_AV1_BIU>, + <&cru SRST_P_AV1>, <&cru SRST_P_AV1_BIU>; }; vicap: video-capture@fdce0000 { -- 2.55.0