From: Arun Iyengar via B4 Relay <devnull+aiyengar1990.gmail.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
David Wu <david.wu@rock-chips.com>,
Damien Le Moal <dlemoal@kernel.org>,
Niklas Cassel <cassel@kernel.org>,
Serge Semin <fancer.lancer@gmail.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
Pranjal Shrivastava <praan@google.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
iommu@lists.linux.dev, Shawn Lin <shawn.lin@rock-chips.com>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Arun Iyengar <aiyengar1990@gmail.com>
Subject: [PATCH 4/9] soc: rockchip: grf: Assign the StreamIDs of the RK3588 PHP SMMU masters
Date: Fri, 13 Nov 2026 16:38:50 +0000 [thread overview]
Message-ID: <20261113-mmu600-php-v1-4-231196049a3b@gmail.com> (raw)
In-Reply-To: <20261113-mmu600-php-v1-0-231196049a3b@gmail.com>
From: Arun Iyengar <aiyengar1990@gmail.com>
The StreamIDs of the six masters behind the RK3588 PHP SMMU come from
PHP GRF registers that reset to 0 and are never programmed, so the SMMU
can not tell the masters apart.
Assign StreamIDs 1-6 on both AXI channels. 0 stays unused, so a master
that loses its ID is aborted instead of using another device's tables.
Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
---
drivers/soc/rockchip/grf.c | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
index b459607c118a..3f0f82a2119f 100644
--- a/drivers/soc/rockchip/grf.c
+++ b/drivers/soc/rockchip/grf.c
@@ -168,6 +168,40 @@ static const struct rockchip_grf_info rk3588_sysgrf __initconst = {
.num_values = ARRAY_SIZE(rk3588_defaults),
};
+/* PHP SMMU StreamIDs: bits 15:0, no write-enable mask */
+#define RK3588_PHP_GRF_GMAC0_SID_AW 0x0074
+#define RK3588_PHP_GRF_GMAC1_SID_AW 0x007c
+#define RK3588_PHP_GRF_SATA0_SID_AW 0x0084
+#define RK3588_PHP_GRF_SATA1_SID_AW 0x008c
+#define RK3588_PHP_GRF_SATA2_SID_AW 0x0094
+#define RK3588_PHP_GRF_GMAC0_SID_AR 0x009c
+#define RK3588_PHP_GRF_GMAC1_SID_AR 0x00a4
+#define RK3588_PHP_GRF_SATA0_SID_AR 0x00ac
+#define RK3588_PHP_GRF_SATA1_SID_AR 0x00b4
+#define RK3588_PHP_GRF_SATA2_SID_AR 0x00bc
+#define RK3588_PHP_GRF_USB3OTG2_SID_AR 0x00c4
+#define RK3588_PHP_GRF_USB3OTG2_SID_AW 0x00cc
+
+static const struct rockchip_grf_value rk3588_defaults_php_grf[] __initconst = {
+ { "gmac0 write streamid", RK3588_PHP_GRF_GMAC0_SID_AW, 1 },
+ { "gmac0 read streamid", RK3588_PHP_GRF_GMAC0_SID_AR, 1 },
+ { "gmac1 write streamid", RK3588_PHP_GRF_GMAC1_SID_AW, 2 },
+ { "gmac1 read streamid", RK3588_PHP_GRF_GMAC1_SID_AR, 2 },
+ { "sata0 write streamid", RK3588_PHP_GRF_SATA0_SID_AW, 3 },
+ { "sata0 read streamid", RK3588_PHP_GRF_SATA0_SID_AR, 3 },
+ { "sata1 write streamid", RK3588_PHP_GRF_SATA1_SID_AW, 4 },
+ { "sata1 read streamid", RK3588_PHP_GRF_SATA1_SID_AR, 4 },
+ { "sata2 write streamid", RK3588_PHP_GRF_SATA2_SID_AW, 5 },
+ { "sata2 read streamid", RK3588_PHP_GRF_SATA2_SID_AR, 5 },
+ { "usb3otg2 write streamid", RK3588_PHP_GRF_USB3OTG2_SID_AW, 6 },
+ { "usb3otg2 read streamid", RK3588_PHP_GRF_USB3OTG2_SID_AR, 6 },
+};
+
+static const struct rockchip_grf_info rk3588_phpgrf __initconst = {
+ .values = rk3588_defaults_php_grf,
+ .num_values = ARRAY_SIZE(rk3588_defaults_php_grf),
+};
+
static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
{
.compatible = "rockchip,rk3036-grf",
@@ -202,6 +236,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
}, {
.compatible = "rockchip,rk3576-ioc-grf",
.data = (void *)&rk3576_iocgrf,
+ }, {
+ .compatible = "rockchip,rk3588-php-grf",
+ .data = (void *)&rk3588_phpgrf,
}, {
.compatible = "rockchip,rk3588-sys-grf",
.data = (void *)&rk3588_sysgrf,
--
2.55.0
next prev parent reply other threads:[~2026-11-13 16:38 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-13 16:38 [PATCH 0/9] RK3588: Enable the PHP SMMU Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 1/9] dt-bindings: net: rockchip-dwmac: Allow iommus Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 2/9] dt-bindings: ata: rockchip,dwc-ahci: " Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 3/9] dt-bindings: soc: rockchip: grf: Allow a clock for the RK3588 PHP GRF Arun Iyengar via B4 Relay
2026-11-13 16:38 ` Arun Iyengar via B4 Relay [this message]
2026-11-13 16:38 ` [PATCH 5/9] arm64: dts: rockchip: Add the PHP GRF clock on RK3588 Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 6/9] soc: rockchip: grf: Restore the RK3588 PHP StreamIDs after system suspend Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 7/9] arm64: dts: rockchip: Add the clock and reset of the RK3588 PHP SMMU Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 8/9] arm64: dts: rockchip: Attach the masters " Arun Iyengar via B4 Relay
2026-11-13 16:38 ` [PATCH 9/9] arm64: dts: rockchip: Enable " Arun Iyengar via B4 Relay
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