From: Hongmei Xu <hongmei.xu@oss.qualcomm.com>
To: "Srinivas Kandagatla" <srini@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Rafał Miłecki" <rafal@milecki.pl>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Hongmei Xu <hongmei.xu@oss.qualcomm.com>
Subject: [PATCH 1/2] dt-bindings: nvmem: add byte-mask property for non-contiguous byte selection
Date: Fri, 13 Nov 2026 15:52:36 +0800 [thread overview]
Message-ID: <20261113-nvmem-byte-mask-for-split-macaddr-v1-1-138f715f18c1@oss.qualcomm.com> (raw)
In-Reply-To: <20261113-nvmem-byte-mask-for-split-macaddr-v1-0-138f715f18c1@oss.qualcomm.com>
Add the byte-mask property to the fixed-cell binding. This allows
selecting non-contiguous physical bytes from an NVMEM region to form
a logical cell value.
Bit N set in byte-mask means physical byte N relative to the cell's
base offset is included in the output; selected bytes are packed into
the output buffer in ascending byte order. If fewer bytes are selected
than the cell's logical size given by reg, the remaining output bytes
are zero-filled. The number of set bits must not exceed the cell's
logical size given by reg. byte-mask and bits are mutually exclusive.
Signed-off-by: Hongmei Xu <hongmei.xu@oss.qualcomm.com>
---
.../bindings/nvmem/layouts/fixed-cell.yaml | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml
index 38e3ad50ff4f..cddda3f70691 100644
--- a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml
+++ b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml
@@ -34,6 +34,21 @@ properties:
description:
Size in bit within the address range specified by reg.
+ byte-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ description: >
+ Bitmask selecting which physical bytes within the NVMEM device region
+ contribute to this cell's output. Bit N set means physical byte N
+ relative to the cell's base offset is included; selected bytes are
+ packed into the output buffer in ascending byte order. If fewer bytes
+ are selected than the cell's logical size given by reg, the remaining
+ output bytes are zero-filled. Byte positions are relative to the cell's
+ base offset and limited to a 32-byte window. The highest set bit must
+ not reference a byte beyond the device size. The number of set bits must
+ not exceed the cell's logical size given by reg. Cannot be used
+ together with bits.
+
allOf:
- if:
properties:
@@ -48,6 +63,13 @@ allOf:
const: 1
required:
- "#nvmem-cell-cells"
+ - if:
+ required: [ byte-mask ]
+ then:
+ properties:
+ bits: false
+ description:
+ byte-mask and bits are mutually exclusive.
required:
- reg
--
2.34.1
next prev parent reply other threads:[~2026-11-13 7:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-13 7:52 [PATCH 0/2] nvmem: Add byte-mask support " Hongmei Xu
2026-11-13 7:52 ` Hongmei Xu [this message]
2026-11-13 7:52 ` [PATCH 2/2] nvmem: core: add byte-mask support for non-contiguous cell bytes Hongmei Xu
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