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Thu, 12 Nov 2026 16:35:42 -0800 (PST) Received: from navid-pc ([2a01:4b00:a856:6220::a11]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-49c609c6451sm2251812f8f.45.2026.11.12.16.35.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Nov 2026 16:35:41 -0800 (PST) From: Navid Ghahremani To: =?utf-8?q?Stefan_D=C3=B6singer?= Cc: linux-arm-kernel@lists.infradead.org, arnd@arndb.de, krzk@kernel.org, Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 04/24] dt-bindings: clock: Add ZTE ZX279128S CRM clock bindings Date: Fri, 13 Nov 2026 00:35:40 +0000 Message-ID: <20261113003540.3660753-1-ghahramani.navid@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: References: <20261014072109.1759502-1-ghahramani.navid@gmail.com> <20261014072109.1759502-5-ghahramani.navid@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi Stefan, Stefan Dösinger wrote: > This would be easier to review if it were split in 3 patches, one yaml per > patch. The next version will have one binding per patch. > Afaiu this makes "syscon" optional. Why do you need syscon? Why might you not > need syscon? It turned out I don't need it, so I dropped syscon from crm2 in my tree. All I have found in crm2 so far are the PCIe clock gates and resets. > I think you should be the maintainer alone here, I don't have the hardware to > do proper testing of patches. OK, I will be the only maintainer there. > I think splitting those into different bindings is still a viable choice. The next version will have separate bindings for lsp0crpm and lsp1crpm. > You can drop the phy child node and just add "#phy-cells=1". Will do. topcrm gets #phy-cells = <1> and no PHY child nodes, and once topcrm is an MFD the PHY driver will use device_set_of_node_from_dev() like you described. > I'd suggest to rename clock/zte,zx279128s-crm.h to clock/zte,zx279128s-clk.h. Will do. > Do they all need to be exported? You only need those that will be used for a > clock = <&topcrm ZX279128S_TOP_SOMETHING> handle. No. The next version will only export the clocks that device tree nodes use, mostly gates, and the PLLs stay inside the driver. You also asked on the RFC whether lsp0crpm really has no resets. I have not tested that yet. I will try your method on the router, clearing the bits, seeing what breaks and then checking whether the device kept its state, and I will reply with what I find. Best regards, Navid