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Thu, 12 Nov 2026 23:32:54 -0800 (PST) Received: from deb05.proceq.com ([213.160.61.66]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-49c5d223a29sm3799903f8f.8.2026.11.12.23.32.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Nov 2026 23:32:53 -0800 (PST) From: Mehmet Fide To: Andi Shyti , Oleksij Rempel Cc: Pengutronix Kernel Team , Frank Li , Sascha Hauer , Fabio Estevam , Yao Yuan , Wolfram Sang , linux-i2c@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH 2/2] i2c: imx: return -ENXIO at once when a DMA write is not acknowledged Date: Fri, 13 Nov 2026 08:32:50 +0100 Message-ID: <20261113073250.1037215-3-mehmet.fide@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261113073250.1037215-1-mehmet.fide@gmail.com> References: <20261113073250.1037215-1-mehmet.fide@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Mehmet Fide When the address of a DMA write is not acknowledged the controller raises its interrupt and no DMA request, so i2c_imx_dma_write() blocks for DMA_TIMEOUT (1 s) and returns -ETIMEDOUT, where the interrupt driven write returns -ENXIO. Let the interrupt handler end the wait when it sees a missing acknowledge during a DMA write, and return -ENXIO. No interrupt arrives while the bytes of a DMA write are acknowledged, so that path does not change. Fixes: ce1a78840ff7 ("i2c: imx: add DMA support for freescale i2c driver") Cc: stable@vger.kernel.org Signed-off-by: Mehmet Fide --- drivers/i2c/busses/i2c-imx.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 1987a0fd8132..09934f3b13ef 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -1108,6 +1108,9 @@ static irqreturn_t i2c_imx_master_isr(struct imx_i2c_struct *i2c_imx, unsigned i switch (i2c_imx->state) { case IMX_I2C_STATE_DMA: i2c_imx->i2csr = status; + if ((status & I2SR_RXAK) && + i2c_imx->dma->dma_transfer_dir == DMA_MEM_TO_DEV) + complete(&i2c_imx->dma->cmd_complete); wake_up(&i2c_imx->queue); break; @@ -1225,6 +1228,11 @@ static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx, return -ETIMEDOUT; } + if (i2c_imx->i2csr & I2SR_RXAK) { + dmaengine_terminate_sync(dma->chan_using); + return -ENXIO; + } + /* Waiting for transfer complete. */ while (1) { temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); -- 2.56.0