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Fri, 13 Nov 2026 08:18:58 -0800 (PST) Received: from xeon ([188.163.112.62]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c5095b24b88sm122297266b.16.2026.11.13.08.18.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Nov 2026 08:18:58 -0800 (PST) From: Svyatoslav Ryhel To: Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Luca Ceresoli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mauro Carvalho Chehab , Greg Kroah-Hartman , Svyatoslav Ryhel , Mikko Perttunen , Hans Verkuil , Sakari Ailus , Cong Nguyen , Faisal Mukhtar , Dan Carpenter , Hungyu Lin , Hao-Qun Huang , Yury Norov , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Cc: linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH v1 10/10] ARM: tegra: Add CSI node for Tegra114 Date: Fri, 13 Nov 2026 18:18:19 +0200 Message-ID: <20261113161819.36847-11-clamor95@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261113161819.36847-1-clamor95@gmail.com> References: <20261113161819.36847-1-clamor95@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add CSI node to Tegra114 device tree. Signed-off-by: Svyatoslav Ryhel --- arch/arm/boot/dts/nvidia/tegra114.dtsi | 34 +++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi index f2766c11ee6c3..61120658f0687 100644 --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi @@ -53,7 +53,7 @@ host1x@50000000 { vi@54080000 { compatible = "nvidia,tegra114-vi"; - reg = <0x54080000 0x00040000>; + reg = <0x54080000 0x00000800>; interrupts = ; clocks = <&tegra_car TEGRA114_CLK_VI>; resets = <&tegra_car 20>; @@ -64,6 +64,38 @@ vi@54080000 { iommus = <&mc TEGRA_SWGROUP_VI>; status = "disabled"; + + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x0 0x54080000 0x4000>; + + csi@800 { + compatible = "nvidia,tegra114-csi"; + reg = <0x800 0x200>; + clocks = <&tegra_car TEGRA114_CLK_CSI>, + <&tegra_car TEGRA114_CLK_CSIA_PAD>, + <&tegra_car TEGRA114_CLK_CSIB_PAD>, + <&tegra_car TEGRA114_CLK_CILAB>, + <&tegra_car TEGRA114_CLK_CILCD>, + <&tegra_car TEGRA114_CLK_CILE>; + clock-names = "csi", "csia-pad", "csib-pad", + "cilab", "cilcd", "cile"; + power-domains = <&pd_venc>; + + assigned-clocks = <&tegra_car TEGRA114_CLK_CILAB>, + <&tegra_car TEGRA114_CLK_CILCD>, + <&tegra_car TEGRA114_CLK_CILE>; + assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_P>, + <&tegra_car TEGRA114_CLK_PLL_P>, + <&tegra_car TEGRA114_CLK_PLL_P>; + assigned-clock-rates = <102000000>, <102000000>, <102000000>; + + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + }; }; epp@540c0000 { -- 2.53.0