From: Lee Jones <lee@kernel.org>
To: Ryan Brue <ryanbrue.dev@gmail.com>
Cc: Sen Chu <sen.chu@mediatek.com>,
Sean Wang <sean.wang@mediatek.com>,
Macpaul Lin <macpaul.lin@mediatek.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Eddie Huang <eddie.huang@mediatek.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
linux-pm@vger.kernel.org, mfd@lists.linux.dev,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-rtc@vger.kernel.org
Subject: Re: [PATCH 2/2] rtc: mt6397: provide the 32 kHz output as a clock
Date: Fri, 13 Nov 2026 18:50:47 +0000 [thread overview]
Message-ID: <20261113185047.GH6323@joneslee-macbookpro.roam.internal> (raw)
In-Reply-To: <20261101-rbrue-suez-upstreaming-mt6397-rtc-32k-v1-2-9758f38d7053@gmail.com>
On Sun, 01 Nov 2026, Ryan Brue wrote:
> The RTC's 32 kHz output is gated by RTC_CON.F32KOB, which the vendor
> kernel clears before it powers the Wi-Fi/Bluetooth combo chip. Mainline
> never touches it, so on a board whose bootloader leaves it set, such a
> chip has no sleep clock and does not come up.
>
> Register the output as a clock when the RTC node has #clock-cells, so
> the chip's power sequence can enable it.
>
> Signed-off-by: Ryan Brue <ryanbrue.dev@gmail.com>
> ---
> drivers/rtc/rtc-mt6397.c | 85 ++++++++++++++++++++++++++++++++++++++++++
> include/linux/mfd/mt6397/rtc.h | 6 +++
> 2 files changed, 91 insertions(+)
>
> diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c
> index d6e156516aa6..5130fecffa7b 100644
> --- a/drivers/rtc/rtc-mt6397.c
> +++ b/drivers/rtc/rtc-mt6397.c
> @@ -6,6 +6,7 @@
>
> #include <linux/array_size.h>
> #include <linux/bitfield.h>
> +#include <linux/clk-provider.h>
> #include <linux/err.h>
> #include <linux/interrupt.h>
> #include <linux/mfd/mt6397/core.h>
> @@ -317,6 +318,84 @@ static int mtk_rtc_nvram_write(void *priv, unsigned int offset, void *val,
> return ret;
> }
>
> +#ifdef CONFIG_COMMON_CLK
> +static int mtk_rtc_clkout_set(struct clk_hw *hw, bool on)
> +{
> + struct mt6397_rtc *rtc = container_of(hw, struct mt6397_rtc, clkout);
> + int ret;
> +
> + mutex_lock(&rtc->lock);
> + ret = regmap_update_bits(rtc->regmap, rtc->addr_base + rtc->data->con,
> + RTC_CON_F32KOB, on ? 0 : RTC_CON_F32KOB);
> + if (!ret)
> + ret = mtk_rtc_write_trigger(rtc);
> + mutex_unlock(&rtc->lock);
> +
> + return ret;
> +}
> +
> +static int mtk_rtc_clkout_prepare(struct clk_hw *hw)
> +{
> + return mtk_rtc_clkout_set(hw, true);
> +}
> +
> +static void mtk_rtc_clkout_unprepare(struct clk_hw *hw)
> +{
> + mtk_rtc_clkout_set(hw, false);
> +}
> +
> +static int mtk_rtc_clkout_is_prepared(struct clk_hw *hw)
> +{
> + struct mt6397_rtc *rtc = container_of(hw, struct mt6397_rtc, clkout);
> + u32 con;
> +
> + if (regmap_read(rtc->regmap, rtc->addr_base + rtc->data->con, &con))
> + return 0;
> +
> + return !(con & RTC_CON_F32KOB);
> +}
> +
> +static unsigned long mtk_rtc_clkout_recalc_rate(struct clk_hw *hw,
> + unsigned long parent_rate)
> +{
> + return 32768;
> +}
> +
> +static const struct clk_ops mtk_rtc_clkout_ops = {
> + .prepare = mtk_rtc_clkout_prepare,
> + .unprepare = mtk_rtc_clkout_unprepare,
> + .is_prepared = mtk_rtc_clkout_is_prepared,
> + .recalc_rate = mtk_rtc_clkout_recalc_rate,
> +};
> +
> +/* The 32 kHz output the PMIC drives to other chips, such as a combo chip */
> +static int mtk_rtc_register_clkout(struct device *dev, struct mt6397_rtc *rtc)
> +{
> + struct clk_init_data init = {
> + .name = "mt6397-rtc-32k",
> + .ops = &mtk_rtc_clkout_ops,
> + };
> + int ret;
> +
> + if (!rtc->data->con || !of_property_present(dev->of_node, "#clock-cells"))
> + return 0;
> +
> + rtc->clkout.init = &init;
> +
> + ret = devm_clk_hw_register(dev, &rtc->clkout);
> + if (ret)
> + return ret;
> +
> + return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
> + &rtc->clkout);
> +}
> +#else
> +static int mtk_rtc_register_clkout(struct device *dev, struct mt6397_rtc *rtc)
> +{
> + return 0;
> +}
> +#endif
> +
> static int mtk_rtc_probe(struct platform_device *pdev)
> {
> struct resource *res;
> @@ -380,6 +459,11 @@ static int mtk_rtc_probe(struct platform_device *pdev)
> if (ret)
> return ret;
>
> + ret = mtk_rtc_register_clkout(&pdev->dev, rtc);
> + if (ret)
> + return dev_err_probe(&pdev->dev, ret,
> + "failed to register the 32k clock\n");
> +
> nvmem_cfg.priv = rtc;
>
> return devm_rtc_nvmem_register(rtc->rtc_dev, &nvmem_cfg);
> @@ -416,6 +500,7 @@ static const struct mtk_rtc_data mt6358_rtc_data = {
>
> static const struct mtk_rtc_data mt6397_rtc_data = {
> .wrtgr = RTC_WRTGR_MT6397,
> + .con = RTC_CON_MT6397,
> };
>
> static const struct of_device_id mt6397_rtc_of_match[] = {
> diff --git a/include/linux/mfd/mt6397/rtc.h b/include/linux/mfd/mt6397/rtc.h
> index f4da579ec638..a8130d726c59 100644
> --- a/include/linux/mfd/mt6397/rtc.h
> +++ b/include/linux/mfd/mt6397/rtc.h
> @@ -9,6 +9,7 @@
> #ifndef _LINUX_MFD_MT6397_RTC_H_
> #define _LINUX_MFD_MT6397_RTC_H_
>
> +#include <linux/clk-provider.h>
> #include <linux/jiffies.h>
> #include <linux/mutex.h>
> #include <linux/regmap.h>
> @@ -22,6 +23,9 @@
> #define RTC_WRTGR_MT6397 0x003c
> #define RTC_WRTGR_MT6323 RTC_WRTGR_MT6397
>
> +#define RTC_CON_MT6397 0x003e
> +#define RTC_CON_F32KOB BIT(5)
> +
> #define RTC_IRQ_STA 0x0002
> #define RTC_IRQ_STA_AL BIT(0)
> #define RTC_IRQ_STA_LP BIT(3)
> @@ -72,6 +76,7 @@
>
> struct mtk_rtc_data {
> u32 wrtgr;
> + u32 con;
These are terrible variable names.
The nomenclature should be self-describing.
> };
>
> struct mt6397_rtc {
> @@ -83,6 +88,7 @@ struct mt6397_rtc {
> int irq;
> u32 addr_base;
> const struct mtk_rtc_data *data;
> + struct clk_hw clkout;
> };
>
> #endif /* _LINUX_MFD_MT6397_RTC_H_ */
>
> --
> 2.55.0
>
--
Lee Jones
prev parent reply other threads:[~2026-11-13 18:50 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-02 5:33 [PATCH 0/2] rtc: mt6397: provide the RTC's " Ryan Brue
2026-11-02 5:33 ` [PATCH 1/2] dt-bindings: mfd: mediatek: mt6397: describe the RTC's 32 kHz output Ryan Brue
2026-11-02 7:47 ` Krzysztof Kozlowski
2026-11-13 16:03 ` (subset) " Lee Jones
2026-11-13 18:55 ` Lee Jones
2026-11-02 5:33 ` [PATCH 2/2] rtc: mt6397: provide the 32 kHz output as a clock Ryan Brue
2026-11-13 18:50 ` Lee Jones [this message]
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