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Fri, 13 Nov 2026 11:19:46 -0800 (PST) Received: from eldorado ([2600:8802:b00:1f88::287]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3797f98b9b2sm9084971eec.6.2026.11.13.11.19.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Nov 2026 11:19:45 -0800 (PST) From: Florian Fainelli To: linux-mips@vger.kernel.org Cc: macro@orcam.me.uk, Florian Fainelli , Thomas Bogendoerfer , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2] MIPS: SiByte: Fix missing function prototypes Date: Fri, 13 Nov 2026 11:19:02 -0800 Message-ID: <20261113191933.477395-1-f.fainelli@gmail.com> X-Mailer: git-send-email 2.53.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The SB1250 SWARM build reports missing prototypes for platform time initialization, SoC setup, IRQ and SMP helpers, and both RTC backends. Signed-off-by: Florian Fainelli --- Changes in v2: - corrected warning reported by kbuild test robot by gating the inclusion of sb1250.h to avoid warnings on bcm63xx_defconfig arch/mips/include/asm/sibyte/sb1250.h | 17 +++++++++++++++++ arch/mips/mm/cerr-sb1.c | 2 -- arch/mips/mm/tlbex.c | 11 +++++++---- arch/mips/sibyte/bcm1480/irq.c | 4 +--- arch/mips/sibyte/bcm1480/smp.c | 6 +----- arch/mips/sibyte/bcm1480/time.c | 4 ++-- arch/mips/sibyte/common/bus_watcher.c | 2 +- arch/mips/sibyte/sb1250/irq.c | 4 +--- arch/mips/sibyte/sb1250/smp.c | 6 +----- arch/mips/sibyte/sb1250/time.c | 4 ++-- arch/mips/sibyte/swarm/rtc.h | 15 +++++++++++++++ arch/mips/sibyte/swarm/rtc_m41t81.c | 1 + arch/mips/sibyte/swarm/rtc_xicor1241.c | 1 + arch/mips/sibyte/swarm/setup.c | 18 ++---------------- 14 files changed, 52 insertions(+), 43 deletions(-) create mode 100644 arch/mips/sibyte/swarm/rtc.h diff --git a/arch/mips/include/asm/sibyte/sb1250.h b/arch/mips/include/asm/sibyte/sb1250.h index de4b352256c8..ff97e77d4fe7 100644 --- a/arch/mips/include/asm/sibyte/sb1250.h +++ b/arch/mips/include/asm/sibyte/sb1250.h @@ -32,9 +32,26 @@ extern unsigned int soc_type; extern unsigned int periph_rev; extern unsigned int zbbus_mhz; +void sb1_cache_error(void); + +#ifdef CONFIG_SIBYTE_BUS_WATCHER +void check_bus_watcher(void); +#endif + +int sb1250_m3_workaround_needed(void); +void sb1250_setup(void); +void sb1250_clockevent_init(void); +void sb1250_clocksource_init(void); +void sb1250_mailbox_interrupt(void); + extern void sb1250_mask_irq(int cpu, int irq); extern void sb1250_unmask_irq(int cpu, int irq); +void bcm1480_setup(void); +void sb1480_clockevent_init(void); +void sb1480_clocksource_init(void); +void bcm1480_mailbox_interrupt(void); + extern void bcm1480_time_init(void); extern void bcm1480_mask_irq(int cpu, int irq); extern void bcm1480_unmask_irq(int cpu, int irq); diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c index a3c02df19f6f..6842244ac85b 100644 --- a/arch/mips/mm/cerr-sb1.c +++ b/arch/mips/mm/cerr-sb1.c @@ -158,8 +158,6 @@ static void check_bus_watcher(void) printk("Bus watcher indicates no error\n"); } } -#else -extern void check_bus_watcher(void); #endif asmlinkage void sb1_cache_error(void) diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 69ea54bdc0c3..03a9b03c3d3a 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -37,6 +37,9 @@ #include #include #include +#ifdef CONFIG_SB1_PASS_2_WORKAROUNDS +#include +#endif #include static int mips_xpa_disabled; @@ -84,13 +87,13 @@ static inline int r4k_250MHZhwbug(void) return 0; } -extern int sb1250_m3_workaround_needed(void); - static inline int __maybe_unused bcm1250_m3_war(void) { - if (IS_ENABLED(CONFIG_SB1_PASS_2_WORKAROUNDS)) - return sb1250_m3_workaround_needed(); +#ifdef CONFIG_SB1_PASS_2_WORKAROUNDS + return sb1250_m3_workaround_needed(); +#else return 0; +#endif } static inline int __maybe_unused r10000_llsc_war(void) diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 4c18a2c755d2..ab329a15d690 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -198,7 +198,7 @@ static struct irq_chip bcm1480_irq_type = { #endif }; -void __init init_bcm1480_irqs(void) +static void __init init_bcm1480_irqs(void) { int i; @@ -303,8 +303,6 @@ void __init arch_init_irq(void) change_c0_status(ST0_IM, imask); } -extern void bcm1480_mailbox_interrupt(void); - static inline void dispatch_ip2(void) { unsigned long long mask_h, mask_l; diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c index 5861e50255bf..ea491f45d9ac 100644 --- a/arch/mips/sibyte/bcm1480/smp.c +++ b/arch/mips/sibyte/bcm1480/smp.c @@ -46,7 +46,7 @@ static void *mailbox_0_regs[] = { /* * SMP init and finish on secondary CPUs */ -void bcm1480_smp_init(void) +static void bcm1480_smp_init(void) { unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 | STATUSF_IP1 | STATUSF_IP0; @@ -83,8 +83,6 @@ static void bcm1480_send_ipi_mask(const struct cpumask *mask, */ static void bcm1480_init_secondary(void) { - extern void bcm1480_smp_init(void); - bcm1480_smp_init(); } @@ -94,8 +92,6 @@ static void bcm1480_init_secondary(void) */ static void bcm1480_smp_finish(void) { - extern void sb1480_clockevent_init(void); - sb1480_clockevent_init(); local_irq_enable(); } diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c index e6450d79fb4f..42db437af306 100644 --- a/arch/mips/sibyte/bcm1480/time.c +++ b/arch/mips/sibyte/bcm1480/time.c @@ -4,8 +4,8 @@ */ #include -extern void sb1480_clockevent_init(void); -extern void sb1480_clocksource_init(void); +#include +#include void __init plat_time_init(void) { diff --git a/arch/mips/sibyte/common/bus_watcher.c b/arch/mips/sibyte/common/bus_watcher.c index a296d2c51841..5df4c82ac2a5 100644 --- a/arch/mips/sibyte/common/bus_watcher.c +++ b/arch/mips/sibyte/common/bus_watcher.c @@ -189,7 +189,7 @@ static irqreturn_t sibyte_bw_int(int irq, void *data) return IRQ_HANDLED; } -int __init sibyte_bus_watcher(void) +static int __init sibyte_bus_watcher(void) { memset(&bw_stats, 0, sizeof(struct bw_stats_struct)); bw_stats.status_printed = 1; diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 57943fe3ac03..8108ead0cea8 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -179,7 +179,7 @@ static struct irq_chip sb1250_irq_type = { #endif }; -void __init init_sb1250_irqs(void) +static void __init init_sb1250_irqs(void) { int i; @@ -266,8 +266,6 @@ void __init arch_init_irq(void) change_c0_status(ST0_IM, imask); } -extern void sb1250_mailbox_interrupt(void); - static inline void dispatch_ip2(void) { unsigned int cpu = smp_processor_id(); diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c index 7a794234e3d7..950d2e1c0de7 100644 --- a/arch/mips/sibyte/sb1250/smp.c +++ b/arch/mips/sibyte/sb1250/smp.c @@ -35,7 +35,7 @@ static void *mailbox_regs[] = { /* * SMP init and finish on secondary CPUs */ -void sb1250_smp_init(void) +static void sb1250_smp_init(void) { unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 | STATUSF_IP1 | STATUSF_IP0; @@ -72,8 +72,6 @@ static inline void sb1250_send_ipi_mask(const struct cpumask *mask, */ static void sb1250_init_secondary(void) { - extern void sb1250_smp_init(void); - sb1250_smp_init(); } @@ -83,8 +81,6 @@ static void sb1250_init_secondary(void) */ static void sb1250_smp_finish(void) { - extern void sb1250_clockevent_init(void); - sb1250_clockevent_init(); local_irq_enable(); } diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c index 8b63000a4dd5..3f7f64fe5690 100644 --- a/arch/mips/sibyte/sb1250/time.c +++ b/arch/mips/sibyte/sb1250/time.c @@ -4,8 +4,8 @@ */ #include -extern void sb1250_clocksource_init(void); -extern void sb1250_clockevent_init(void); +#include +#include void __init plat_time_init(void) { diff --git a/arch/mips/sibyte/swarm/rtc.h b/arch/mips/sibyte/swarm/rtc.h new file mode 100644 index 000000000000..64b8db786575 --- /dev/null +++ b/arch/mips/sibyte/swarm/rtc.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef _SIBYTE_SWARM_RTC_H +#define _SIBYTE_SWARM_RTC_H + +#include + +int xicor_probe(void); +int xicor_set_time(time64_t t); +time64_t xicor_get_time(void); + +int m41t81_probe(void); +int m41t81_set_time(time64_t t); +time64_t m41t81_get_time(void); + +#endif /* _SIBYTE_SWARM_RTC_H */ diff --git a/arch/mips/sibyte/swarm/rtc_m41t81.c b/arch/mips/sibyte/swarm/rtc_m41t81.c index afe1e3460bd4..e70ec1870674 100644 --- a/arch/mips/sibyte/swarm/rtc_m41t81.c +++ b/arch/mips/sibyte/swarm/rtc_m41t81.c @@ -17,6 +17,7 @@ #include #include +#include "rtc.h" /* M41T81 definitions */ diff --git a/arch/mips/sibyte/swarm/rtc_xicor1241.c b/arch/mips/sibyte/swarm/rtc_xicor1241.c index e2164200ceec..5bb2bc6a57d2 100644 --- a/arch/mips/sibyte/swarm/rtc_xicor1241.c +++ b/arch/mips/sibyte/swarm/rtc_xicor1241.c @@ -17,6 +17,7 @@ #include #include +#include "rtc.h" /* Xicor 1241 definitions */ diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 38c90b5e8754..a910961ad967 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c @@ -35,28 +35,14 @@ #include #include -#ifdef CONFIG_SIBYTE_BCM1x80 -extern void bcm1480_setup(void); -#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) -extern void sb1250_setup(void); -#else -#error invalid SiByte board configuration -#endif - -extern int xicor_probe(void); -extern int xicor_set_time(time64_t); -extern time64_t xicor_get_time(void); - -extern int m41t81_probe(void); -extern int m41t81_set_time(time64_t); -extern time64_t m41t81_get_time(void); +#include "rtc.h" const char *get_system_type(void) { return "SiByte " SIBYTE_BOARD_NAME; } -int swarm_be_handler(struct pt_regs *regs, int is_fixup) +static int swarm_be_handler(struct pt_regs *regs, int is_fixup) { if (!is_fixup && (regs->cp0_cause & 4)) { /* Data bus error - print PA */ -- 2.53.0