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Fri, 13 Nov 2026 19:05:48 -0800 (PST) Received: from apollo.purestorage.com ([208.88.152.253]) by smtp.googlemail.com with ESMTPSA id a92af1059eb24-1b50316e008sm10829382c88.6.2026.11.13.19.05.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Nov 2026 19:05:48 -0800 (PST) From: Mohamed Khalfella To: Keith Busch , Jens Axboe , Christoph Hellwig , Sagi Grimberg Cc: Justin Tee , Naresh Gottumukkala , Paul Ely , Hannes Reinecke , Chaitanya Kulkarni , James Smart , Randy Jennings , Mohamed Khalfella , Daniel Wagner , linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org, Hannes Reinecke Subject: [PATCH v7 01/17] nvmet: Rapid Path Failure Recovery set controller identify fields Date: Fri, 13 Nov 2026 19:04:15 -0800 Message-ID: <20261114030454.2836543-2-mkhalfella@purestorage.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261114030454.2836543-1-mkhalfella@purestorage.com> References: <20261114030454.2836543-1-mkhalfella@purestorage.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit TP8028 Rapid Path Failure Recovery defined new fields in controller identify response. The newly defined fields are: - CIU (Controller Instance Uniquifier): is an 8bit non-zero value that is assigned a random value when controller is first created. The value will be incremented when RDY bit in CSTS register is asserted. - CIRN (Controller Instance Random Number): is 64bit random value that gets generated when controller is created. CIRN is regenerated every time RDY bit in CSTS register is asserted. - CCRL (Cross-Controller Reset Limit): is an 8bit value that defines the maximum number of in-progress controller reset operations. CCRL is hardcoded to 4 because TP8028 recommended a value no less than 4. These fields are set for non-discovery subsystems only. Signed-off-by: Mohamed Khalfella Reviewed-by: Hannes Reinecke Reviewed-by: Sagi Grimberg Reviewed-by: Daniel Wagner --- drivers/nvme/target/admin-cmd.c | 5 +++++ drivers/nvme/target/core.c | 9 +++++++++ drivers/nvme/target/nvmet.h | 2 ++ include/linux/nvme.h | 10 ++++++++-- 4 files changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/nvme/target/admin-cmd.c b/drivers/nvme/target/admin-cmd.c index f12d83098644..5710ae53eb83 100644 --- a/drivers/nvme/target/admin-cmd.c +++ b/drivers/nvme/target/admin-cmd.c @@ -702,6 +702,11 @@ static void nvmet_execute_identify_ctrl(struct nvmet_req *req) id->mdts = nvmet_ctrl_mdts(req); id->cntlid = cpu_to_le16(ctrl->cntlid); id->ver = cpu_to_le32(ctrl->subsys->ver); + if (!nvmet_is_disc_subsys(ctrl->subsys)) { + id->ciu = ctrl->ciu; + id->cirn = cpu_to_le64(ctrl->cirn); + id->ccrl = NVMF_CCR_LIMIT; + } /* XXX: figure out what to do about RTD3R/RTD3 */ id->oaes = cpu_to_le32(NVMET_AEN_CFG_OPTIONAL); diff --git a/drivers/nvme/target/core.c b/drivers/nvme/target/core.c index cc1955bc8c84..9c9ad4d9b292 100644 --- a/drivers/nvme/target/core.c +++ b/drivers/nvme/target/core.c @@ -1429,6 +1429,10 @@ static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl) return; } + if (!nvmet_is_disc_subsys(ctrl->subsys)) { + ctrl->ciu = ((u8)(ctrl->ciu + 1)) ? : 1; + ctrl->cirn = get_random_u64() ? : 1; + } ctrl->csts = NVME_CSTS_RDY; /* @@ -1729,6 +1733,11 @@ struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args) } ctrl->cntlid = ret; + if (!nvmet_is_disc_subsys(ctrl->subsys)) { + ctrl->ciu = get_random_u8() ? : 1; + ctrl->cirn = get_random_u64() ? : 1; + } + ret = nvmet_ctrl_init_pr(ctrl); if (ret) goto init_pr_fail; diff --git a/drivers/nvme/target/nvmet.h b/drivers/nvme/target/nvmet.h index 2c2460ef5e2b..fba4d320f907 100644 --- a/drivers/nvme/target/nvmet.h +++ b/drivers/nvme/target/nvmet.h @@ -274,7 +274,9 @@ struct nvmet_ctrl { uuid_t hostid; u16 cntlid; u16 max_qid; + u8 ciu; u32 kato; + u64 cirn; bool tbkas; struct nvmet_port *port; diff --git a/include/linux/nvme.h b/include/linux/nvme.h index 6248711784b3..a3c1b1713b4f 100644 --- a/include/linux/nvme.h +++ b/include/linux/nvme.h @@ -21,6 +21,8 @@ #define NVMF_TRADDR_SIZE 256 #define NVMF_TSAS_SIZE 256 +#define NVMF_CCR_LIMIT 4 + #define NVME_DISC_SUBSYS_NAME "nqn.2014-08.org.nvmexpress.discovery" #define NVME_NSID_ALL 0xffffffff @@ -328,7 +330,10 @@ struct nvme_id_ctrl { __le16 crdt1; __le16 crdt2; __le16 crdt3; - __u8 rsvd134[122]; + __u8 rsvd134[1]; + __u8 ciu; + __le64 cirn; + __u8 rsvd144[112]; __le16 oacs; __u8 acl; __u8 aerl; @@ -389,7 +394,8 @@ struct nvme_id_ctrl { __u8 msdbd; __u8 rsvd1804[2]; __u8 dctype; - __u8 rsvd1807[241]; + __u8 ccrl; + __u8 rsvd1808[240]; struct nvme_id_power_state psd[32]; __u8 vs[1024]; }; -- 2.56.0