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[2a02:a44e:4ae7:1:c0e:6d5a:8ae2:915]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b7c6a5924bsm2665270a12.18.2026.11.14.18.10.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Nov 2026 18:10:23 -0800 (PST) From: Majid Hajiheidari To: barnabas.czeman@mainlining.org Cc: andersson@kernel.org, konradybcio@kernel.org, rafael@kernel.org, viresh.kumar@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, abelvesa@kernel.org, mani@kernel.org, admin@mswin.me, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/3] arm64: dts: qcom: sm6125: Add cpufreq-hw and CPU idle states Date: Sun, 15 Nov 2026 03:10:11 +0100 Message-ID: <20261115021019.731462-1-majidhhdri@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261115003158.391171-1-majidhhdri@gmail.com> References: <20261115003158.391171-1-majidhhdri@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi Barnabás, I should have put you on Cc of this series, sorry. After sending it I looked at your sm61x5 7.3-develop branch and saw that you have cpufreq for SM6125 there as well, done differently, so I would like to sort this out with you rather than have two versions on the list. The differences as far as I can see: - Your branch gives qcom,sm6125-cpufreq-hw its own soc data in the driver (lut_max_entries = 12) and makes the clocks optional, with 19.2 MHz and 300 MHz as defaults. This series uses the generic qcom,cpufreq-hw fallback like SM6115 does, and takes "xo" from rpmcc and "alternate" from GCC GPLL0_OUT_EARLY, so it needs no driver change. - I booted your branch (cdcfb1386, plus the laurel-sprout board part for mpss and wifi) on my Mi A3 to compare. Both versions give exactly the same tables: policy0: 300000 614400 864000 1017600 1305600 1420800 1612800 1804800 policy4: 300000 652800 902400 1056000 1401600 1536000 1804800 2016000 With the generic data the LUT read stops at the first repeated row, so the 40 row limit is never reached on this phone. Did you see it cause a problem on another device, or is the 12 from the downstream max-lut-entries? If some SM6125 board fills all 12 rows I see why the limit matters, and I am happy to rework this series or to drop the cpufreq part in favour of yours, whichever you and the maintainers prefer. Beyond cpufreq: on that boot your mpss and wifi nodes worked on laurel-sprout with only the board enablement added (firmware-name and the four WCN3990 supplies): the modem came up and wlan0 associated. Two things I noticed, in case they are useful: - the modem crashed twice during startup ("fatal error without message" at 103 s and 145 s), recovered both times and then stayed up; - ModemManager did not find a modem. On my own tree, which also has the IPA node and a dynamically allocated rmtfs region, it registers and I see no crashes. I have not tried to find out which difference matters. I have modem, WiFi, ADSP/CDSP, Bluetooth and IPA device tree running on this phone on next-20261113, but since you have modem and WiFi in progress I will not post those. I can test your patches on laurel-sprout and reply with Tested-by, and if it helps I can send the parts you do not have yet (for example Bluetooth, ADSP/CDSP or the laurel-sprout board enablement). Just tell me what would be useful. Thanks, Majid