From: Judith Mendez <jm@ti.com>
To: Adrian Hunter <adrian.hunter@intel.com>,
Andrew Davis <afd@ti.com>, Ulf Hansson <ulf.hansson@linaro.org>
Cc: <linux-mmc@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3] mmc: sdhci_am654: Disable HS400 for AM62P SR1.0 and SR1.1
Date: Tue, 19 Aug 2025 08:31:26 -0500 [thread overview]
Message-ID: <202def9b-b9f2-4be1-a21c-6ba9e442d0f5@ti.com> (raw)
In-Reply-To: <f117bc05-893f-4c89-8cb7-3f40a8bfb92d@intel.com>
On 8/19/25 8:21 AM, Adrian Hunter wrote:
> On 18/08/2025 23:38, Andrew Davis wrote:
>> On 8/18/25 3:33 PM, Judith Mendez wrote:
>>> This adds SDHCI_AM654_QUIRK_DISABLE_HS400 quirk which shall be used
>>> to disable HS400 support. AM62P SR1.0 and SR1.1 do not support HS400
>>> due to errata i2458 [0] so disable HS400 for these SoC revisions.
>>>
>>> [0] https://www.ti.com/lit/er/sprz574a/sprz574a.pdf
>>> Signed-off-by: Judith Mendez <jm@ti.com>
>>> ---
>>> This patch was separated from [0] since it will be merged to
>>> different trees anyways.
>>>
>>> Link to v2:
>>> [0] https://lore.kernel.org/linux-mmc/20250807225138.1228333-1-jm@ti.com
>>> ---
>>> drivers/mmc/host/sdhci_am654.c | 18 ++++++++++++++++++
>>> 1 file changed, 18 insertions(+)
>>>
>>> diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
>>> index 8a099508b939..cc8c4145bf2b 100644
>>> --- a/drivers/mmc/host/sdhci_am654.c
>>> +++ b/drivers/mmc/host/sdhci_am654.c
>>> @@ -155,6 +155,7 @@ struct sdhci_am654_data {
>>> #define SDHCI_AM654_QUIRK_FORCE_CDTEST BIT(0)
>>> #define SDHCI_AM654_QUIRK_SUPPRESS_V1P8_ENA BIT(1)
>>> +#define SDHCI_AM654_QUIRK_DISABLE_HS400 BIT(2)
>>> };
>>> struct window {
>>> @@ -764,6 +765,7 @@ static int sdhci_am654_init(struct sdhci_host *host)
>>> {
>>> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
>>> struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host);
>>> + struct device *dev = mmc_dev(host->mmc);
>>> u32 ctl_cfg_2 = 0;
>>> u32 mask;
>>> u32 val;
>>> @@ -819,6 +821,12 @@ static int sdhci_am654_init(struct sdhci_host *host)
>>> if (ret)
>>> goto err_cleanup_host;
>>> + if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_DISABLE_HS400 &&
>>> + host->mmc->caps2 & (MMC_CAP2_HS400 | MMC_CAP2_HS400_ES)) {
>>> + dev_info(dev, "Disable descoped HS400 mode for this silicon revision\n");
>>
>> Messages to the user do not need to be imperative, maybe:
>>
>> "Disabling HS400 mode not supported on this silicon revision\n"
>>
>> Not a blocker,
>>
>> Reviewed-by: Andrew Davis <afd@ti.com>
>
> I agree about the message. Another possibility:
> "HS400 mode is not supported on this silicon revision, disabling it"
>
Ok, that is no problem, I will fix for v4. Thanks!
~ Judith
> Otherwise:
>
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
>
prev parent reply other threads:[~2025-08-19 13:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-18 20:33 Judith Mendez
2025-08-18 20:38 ` Andrew Davis
2025-08-19 13:21 ` Adrian Hunter
2025-08-19 13:31 ` Judith Mendez [this message]
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