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charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: jDGZhNZus31HqLwc1GscPmcvR6qukzTD X-Proofpoint-ORIG-GUID: jDGZhNZus31HqLwc1GscPmcvR6qukzTD X-Proofpoint-Spam-Info: AW1haW4tMjYwNzAzMDA5MCBTYWx0ZWRfX8W90p3RU4+xf FmEna9mFpigRmrCktcMaYgGzzDiqXv+qz4Asj/5jZ9/I/um7hdIThaJoP3ah2U9Hb+8YKUhJADt 7JMybKc5yHa6CKfgZ7zoZmK1lZIcu5s= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzAzMDA5MCBTYWx0ZWRfX3fqkJaEly0I8 aNRPqjwBAqv02l5WWAo0YG3753xJQ/AztmCEPouBU5RPe0lYToj4a+mgqXYlieT94lYq3ISxulu BFjbueUv1MXHFB1Avvl3R1hwvdbt4MtZGTqXvl8O8dtOl5fq8Pg4RunQy5j8Vr01BJcrvzgKcu2 M5S9LRkM2iH5ZFyRzOvC+Xt/h3KMGOxqe3rihGOFcTSVVZ4gRzNuejnIzSp8RWcF+VsMb2xlYVA mUESL519q7j1j61vBNJEJf2xEARtmOzIfytOpXa0YbBOPDpm7eXehtrcwktIFcFuslbDviVpOeW FB+3oCpPYzvClOr3td5J3aiGcniF7F7y81Gnv3TVI/tj1UGP4+qMvo9qqAP53mDNJdqqtPYN49N HIP3NnPuJa8GQw/I3uhhKYddy951C/h6QwNTSUbO/sZgHveSV/SisxXtHZ+9ybRYmtB2C3ubnmq JhvVZVo6McJ49voycCg== X-Authority-Analysis: v=2.4 cv=OaKoyBTY c=1 sm=1 tr=0 ts=6a478152 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=CzlgM8hXaGG7tx5CzA4A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-07-03_02,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 spamscore=0 phishscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607030090 On 6/29/2026 12:09 AM, Val Packett wrote: > > On 6/16/26 6:25 AM, Maulik Shah wrote: >> [..] >> --- >> Maulik Shah (7): >>        irqchip/qcom-pdc: restructure version support >>        irqchip/qcom-pdc: Move all statics to struct pdc_desc >>        irqchip/qcom-pdc: Remove pdc_enable_intr() wrapper >>        irqchip/qcom-pdc: Differentiate between direct SPI and GPIO as SPI >>        irqchip/qcom-pdc: Configure PDC to pass through mode >>        Revert "pinctrl: qcom: x1e80100: Bypass PDC wakeup parent for now" >>        arm64: dts: qcom: x1e80100: Add deepest idle state >> >> Stephan Gerhold (1): >>        pinctrl: qcom: Acknowledge IRQs for PDC interrupt controller >> >> [..] > > Something about this series breaks the touchscreen interrupt (<&tlmm 81 IRQ_TYPE_LEVEL_LOW>) on sm7325-motorola-dubai :( > > With this series, that interrupt only happens once (stuck at 1 in /proc/interrupts) so events are not reported. Something something level triggered..?? > Hi Val, Thanks for reporting this. This seems likely because patch 6 of the series adding IRQCHIP_EOI_THREADED flag for gpio irqchip. In v4, removing this flag and modifying .irq_mask/irq_unmask callback for secondary chip to have similar functionality as IRQCHIP_EOI_THREADED. Thanks, Maulik