From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FD3AC10F25 for ; Mon, 9 Mar 2020 19:35:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 44F4E24671 for ; Mon, 9 Mar 2020 19:35:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726776AbgCITfd (ORCPT ); Mon, 9 Mar 2020 15:35:33 -0400 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:22384 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726582AbgCITfZ (ORCPT ); Mon, 9 Mar 2020 15:35:25 -0400 Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-02.qualcomm.com with ESMTP; 09 Mar 2020 12:35:22 -0700 Received: from gurus-linux.qualcomm.com ([10.46.162.81]) by ironmsg03-sd.qualcomm.com with ESMTP; 09 Mar 2020 12:35:21 -0700 Received: by gurus-linux.qualcomm.com (Postfix, from userid 383780) id 148F94973; Mon, 9 Mar 2020 12:35:21 -0700 (PDT) From: Guru Das Srinagesh To: linux-pwm@vger.kernel.org Cc: Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Subbaraman Narayanamurthy , linux-kernel@vger.kernel.org, Guru Das Srinagesh , Fabrice Gasnier , Maxime Coquelin , Alexandre Torgue Subject: [PATCH v7 10/13] pwm: stm32-lp: Use %llu format specifier for period Date: Mon, 9 Mar 2020 12:35:13 -0700 Message-Id: <20ac22dbeb9e41bdcb594ee82f6ccd609c3426c6.1583782035.git.gurus@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Because period and duty cycle are defined in the PWM framework structs as ints with units of nanoseconds, the maximum time duration that can be set is limited to ~2.147 seconds. Redefining them as u64 values will enable larger time durations to be set. As a first step, prepare this driver to handle the switch to u64 period and duty_cycle by updating the format specifier in this dev_dbg message. The actual switch to u64 period and duty_cycle follows as a separate patch. Cc: Fabrice Gasnier Cc: Maxime Coquelin Cc: Alexandre Torgue Signed-off-by: Guru Das Srinagesh --- drivers/pwm/pwm-stm32-lp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c index 67fca62..134c146 100644 --- a/drivers/pwm/pwm-stm32-lp.c +++ b/drivers/pwm/pwm-stm32-lp.c @@ -61,7 +61,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, do_div(div, NSEC_PER_SEC); if (!div) { /* Clock is too slow to achieve requested period. */ - dev_dbg(priv->chip.dev, "Can't reach %u ns\n", state->period); + dev_dbg(priv->chip.dev, "Can't reach %llu ns\n", state->period); return -EINVAL; } -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project