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Thu, 22 Oct 2026 00:52:59 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c468a55c76fsm77938166b.36.2026.10.22.00.52.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 22 Oct 2026 00:52:58 -0700 (PDT) Message-ID: <21185cf6-253e-48bf-ae7c-bb160a4c089d@oss.qualcomm.com> Date: Thu, 22 Oct 2026 09:52:56 +0200 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/5] firmware: qcom: Add an TEE bus based ICE back-end To: Harshal Dev , Bjorn Andersson , Konrad Dybcio , Abel Vesa , Kuldeep Singh , Neeraj Soni , Manivannan Sadhasivam , Sumit Garg , Selvam Sathappan Periakaruppan Cc: Basant Kumar , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org References: <20261021-ice-migrate-tee-svc-v1-0-b035be7aab0a@oss.qualcomm.com> <20261021-ice-migrate-tee-svc-v1-3-b035be7aab0a@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261021-ice-migrate-tee-svc-v1-3-b035be7aab0a@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=JudkP84C c=1 sm=1 tr=0 ts=6ad9c0dd cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=SRtFinbuMe9puuQICA4A:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-ORIG-GUID: Kv12jS0EhWSUeQx1OSZNHTzAWHcNU9Kx X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIyMDAzMSBTYWx0ZWRfX8DcNftWdMbT8 0eM61dTpH5Nw/GHW02f9mqVB5g9CFV4MkGl+1UqdtWUkdXg+kWRiSHXqbbtIzRlQNtCjZPcbq1z uXeVnpFiCOESsNMvXQuzub/MX2EKLzE= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIyMDAzMSBTYWx0ZWRfX6Jo9b4996mEs W60KwrnAv1793ZzXy1KU9BYM5nzbtbLL9IePZbuhHyGkggPfhXTL5Sss8aZ0SagHQSdH6bFsKmv rUp/mXzIMX9yPImASDrQRzgA9lR7DEx3WeMgqr1SERrGxNEMVnC1akS7xdlLyKVYI+OzNxPb4AB KsSC1XhqxxYHzTKy56TFxbFP0jlRc/xJT4S/3yXDEmYGzN7BfVWRj68R41rFVxRMbet1ab/yLEh wfw2CY+9ujrr4nBMv6Fe5QAYn+EYIaRicXGqRsq9g6iZpneAttk/J9asEfdq56q8gF4AGmO8RZe brZrmPGTZj2Id1jaaenGdF6Uy5zvOuxtVkclgePzheZIiSq7EeR0cenC5m0UBZdKXMSEYSYGK7q BtymURsPdoPm2BodiHtb8kZ6jqGch7j2v5zbNHwI9ZM8ypmaq5ZJL7NbAI4ZTB7wrFW5OoWdZyW JVPQ0gMv1Rx0NtICHLw== X-Proofpoint-GUID: Kv12jS0EhWSUeQx1OSZNHTzAWHcNU9Kx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-22_03,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 malwarescore=0 impostorscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610220031 On 10/21/26 5:43 PM, Harshal Dev wrote: > Add support for a TEE client driver which forwards calls from the Inline > Crypto Engine (ICE) service (invoked by the ICE driver) to the OPTEE ICE > Psuedo-TA. > > The ICE PTA supports both ICE Legacy and Standard modes. In Standard mode > Hardware Key Manager v1 is supported. > > Signed-off-by: Harshal Dev > --- [...] > +static int qcom_ice_tee_generate_key(struct device *dev, > + u8 *lt_key, size_t lt_key_size) > +{ > + struct qcom_ice_tee_private *data = dev_get_drvdata(dev); > + struct tee_ioctl_invoke_arg inv_arg = { > + .func = PTA_QCOM_ICE_GENERATE_KEY, > + .session = data->session_id, > + .num_params = TEE_NUM_PARAMS, > + }; > + struct tee_param param[TEE_NUM_PARAMS] = { }; > + struct tee_shm *key_shm; > + u8 *buf; > + size_t out_size; > + int ret; > + > + key_shm = tee_shm_alloc_kernel_buf(data->ctx, lt_key_size); > + if (IS_ERR(key_shm)) > + return PTR_ERR(key_shm); > + > + param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT; > + param[0].u.memref.shm = key_shm; > + param[0].u.memref.shm_offs = 0; > + param[0].u.memref.size = lt_key_size; > + > + ret = tee_client_invoke_func(data->ctx, &inv_arg, param); > + if (ret < 0 || inv_arg.ret != 0) { > + dev_err(dev, > + "ICE generate_key failed, ret=%d, err=0x%x\n", > + ret, inv_arg.ret); > + ret = ret ?: -EINVAL; > + goto out; > + } > + > + buf = tee_shm_get_va(key_shm, 0); > + out_size = param[0].u.memref.size; > + > + memcpy(lt_key, buf, lt_key_size); > + memzero_explicit(buf, out_size); LLM says: s/out_size/lt_key_size here? Or said another way, currently lt_key_size and out_size are not cross checked [...] > +static int qcom_ice_tee_probe(struct tee_client_device *ice_dev) > +{ > + struct device *dev = &ice_dev->dev; > + struct qcom_ice_tee_private *data; > + struct tee_ioctl_open_session_arg sess_arg = { > + .clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL, > + }; > + int ret, err = -ENODEV; > + > + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); > + if (!data) > + return -ENOMEM; > + > + data->ctx = tee_client_open_context(NULL, optee_ctx_match, NULL, NULL); > + if (IS_ERR(data->ctx)) > + return -ENODEV; > + > + export_uuid(sess_arg.uuid, &ice_dev->id.uuid); > + ret = tee_client_open_session(data->ctx, &sess_arg, NULL); > + if (ret < 0 || sess_arg.ret != 0) { > + dev_err(dev, > + "tee_client_open_session failed, ret=%d, err=0x%x\n", > + ret, sess_arg.ret); > + err = ret ?: -EINVAL; > + goto out_ctx; > + } > + > + data->session_id = sess_arg.session; > + dev_set_drvdata(dev, data); > + > + qcom_ice_ops_tee.dev = dev; > + qcom_ice_svc_ops_register(&qcom_ice_ops_tee); > + > + return ret; This is always a 'return 0' Konrad