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Tue, 16 Sep 2025 04:19:40 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EC3E720040; Tue, 16 Sep 2025 04:19:39 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 46C1920049; Tue, 16 Sep 2025 04:19:32 +0000 (GMT) Received: from [9.39.20.171] (unknown [9.39.20.171]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 16 Sep 2025 04:19:32 +0000 (GMT) Message-ID: <2129847d-8058-424e-89b1-5d072b281ce3@linux.ibm.com> Date: Tue, 16 Sep 2025 09:49:31 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC V2 3/8] powerpc: introduce arch_enter_from_user_mode To: Shrikanth Hegde , Mukesh Kumar Chaurasiya Cc: maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu, oleg@redhat.com, kees@kernel.org, luto@amacapital.net, wad@chromium.org, deller@gmx.de, ldv@strace.io, macro@orcam.me.uk, charlie@rivosinc.com, akpm@linux-foundation.org, bigeasy@linutronix.de, ankur.a.arora@oracle.com, naveen@kernel.org, thomas.weissschuh@linutronix.de, Jason@zx2c4.com, peterz@infradead.org, tglx@linutronix.de, namcao@linutronix.de, kan.liang@linux.intel.com, mingo@kernel.org, oliver.upton@linux.dev, mark.barnett@arm.com, atrajeev@linux.vnet.ibm.com, rppt@kernel.org, coltonlewis@google.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org References: <20250908210235.137300-2-mchauras@linux.ibm.com> <20250908210235.137300-5-mchauras@linux.ibm.com> <188f79ef-6ad4-4144-b73b-9e1090f4fc95@linux.ibm.com> Content-Language: en-US, en-IN, en-GB From: Mukesh Kumar Chaurasiya In-Reply-To: <188f79ef-6ad4-4144-b73b-9e1090f4fc95@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Authority-Analysis: v=2.4 cv=BKWzrEQG c=1 sm=1 tr=0 ts=68c8e562 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=VnNF1IyMAAAA:8 a=S892im0M2olbNhx55RsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: Dby_u1cUep2zOakaY6LBdvUsnq6ffJx3 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTE1MDA4NiBTYWx0ZWRfX2rpdrMZCdB2v DArpuFXmyiEbjR+BXx6sfK9bNjQDO2zSm1u8ukai7yAkIisWOcRIFn0SKCgazNnshDZ1iBUrvQJ Sw+ti8b9mg3n2ICxpEMC1j7tGGjIQ7xFYRwukQqvIk6yl/Z1Nl+nvbGsnfgfqmPjHnv/oM0x6OJ 01iiKCr2pXTKveErvJC/ZE/ELS9auylW09ChrU3HIE+e7zZlryhJzZtI2hBmAHhAft2Clt5kosO gDPomokiuTZzM6pv8ESWswJW3mgW0wnmFeFStMzxjIsEjRbL+1KHnO7OswISIZikhgxJ8AhQrxG Kw83fXK5uDqe7gauNnJxf+YDd97XQj9YlLBU2Oz49+MT/Z/olgzokAxJ+mcnPQMxPFlFrRnGqWB 4/4QJFBc X-Proofpoint-ORIG-GUID: 7nzj9B2-PAMJBT1O8w32L4ndZvImg3DU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-16_01,2025-09-12_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1011 malwarescore=0 priorityscore=1501 adultscore=0 suspectscore=0 impostorscore=0 bulkscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509150086 On 9/14/25 2:32 PM, Shrikanth Hegde wrote: > > > On 9/9/25 2:32 AM, Mukesh Kumar Chaurasiya wrote: >> - Implement the hook arch_enter_from_user_mode for syscall entry. > > nit: for generic syscall infra. Cool, will change this. > >> - Move booke_load_dbcr0 from interrupt.c to interrupt.h >> >> No functional change intended. >> >> Signed-off-by: Mukesh Kumar Chaurasiya >> --- >>   arch/powerpc/include/asm/entry-common.h | 96 +++++++++++++++++++++++++ >>   arch/powerpc/include/asm/interrupt.h    | 23 ++++++ >>   arch/powerpc/kernel/interrupt.c         | 22 ------ >>   3 files changed, 119 insertions(+), 22 deletions(-) >> >> diff --git a/arch/powerpc/include/asm/entry-common.h >> b/arch/powerpc/include/asm/entry-common.h >> index 3af16d821d07e..49607292bf5a5 100644 >> --- a/arch/powerpc/include/asm/entry-common.h >> +++ b/arch/powerpc/include/asm/entry-common.h >> @@ -5,7 +5,103 @@ >>     #ifdef CONFIG_GENERIC_IRQ_ENTRY >>   +#include >> +#include >>   #include >> +#include >> + >> +static __always_inline void arch_enter_from_user_mode(struct pt_regs >> *regs) >> +{ >> +    if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) >> +        BUG_ON(irq_soft_mask_return() != IRQS_ALL_DISABLED); >> + >> +    BUG_ON(regs_is_unrecoverable(regs)); >> +    BUG_ON(!user_mode(regs)); >> +    BUG_ON(regs_irqs_disabled(regs)); >> + >> +#ifdef CONFIG_PPC_PKEY >> +    if (mmu_has_feature(MMU_FTR_PKEY)) { >> +        unsigned long amr, iamr; >> +        bool flush_needed = false; >> +        /* >> +         * When entering from userspace we mostly have the AMR/IAMR >> +         * different from kernel default values. Hence don't compare. >> +         */ >> +        amr = mfspr(SPRN_AMR); >> +        iamr = mfspr(SPRN_IAMR); >> +        regs->amr  = amr; >> +        regs->iamr = iamr; >> +        if (mmu_has_feature(MMU_FTR_KUAP)) { >> +            mtspr(SPRN_AMR, AMR_KUAP_BLOCKED); >> +            flush_needed = true; >> +        } >> +        if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) { >> +            mtspr(SPRN_IAMR, AMR_KUEP_BLOCKED); >> +            flush_needed = true; >> +        } >> +        if (flush_needed) >> +            isync(); >> +    } else >> +#endif >> +        kuap_assert_locked(); >> + >> +    booke_restore_dbcr0(); >> + >> +    account_cpu_user_entry(); >> + >> +    account_stolen_time(); >> + >> +    /* >> +     * This is not required for the syscall exit path, but makes the >> +     * stack frame look nicer. If this was initialised in the first >> stack >> +     * frame, or if the unwinder was taught the first stack frame >> always >> +     * returns to user with IRQS_ENABLED, this store could be avoided! >> +     */ >> +    irq_soft_mask_regs_set_state(regs, IRQS_ENABLED); >> + >> +    /* >> +     * If system call is called with TM active, set _TIF_RESTOREALL to >> +     * prevent RFSCV being used to return to userspace, because POWER9 >> +     * TM implementation has problems with this instruction >> returning to >> +     * transactional state. Final register values are not relevant >> because >> +     * the transaction will be aborted upon return anyway. Or in the >> case >> +     * of unsupported_scv SIGILL fault, the return state does not much >> +     * matter because it's an edge case. >> +     */ >> +    if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && >> +            unlikely(MSR_TM_TRANSACTIONAL(regs->msr))) >> +        set_bits(_TIF_RESTOREALL, ¤t_thread_info()->flags); >> + >> +    /* >> +     * If the system call was made with a transaction active, doom >> it and >> +     * return without performing the system call. Unless it was an >> +     * unsupported scv vector, in which case it's treated like an >> illegal >> +     * instruction. >> +     */ >> +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM >> +    if (unlikely(MSR_TM_TRANSACTIONAL(regs->msr)) && >> +        !trap_is_unsupported_scv(regs)) { >> +        /* Enable TM in the kernel, and disable EE (for scv) */ >> +        hard_irq_disable(); >> +        mtmsr(mfmsr() | MSR_TM); >> + >> +        /* tabort, this dooms the transaction, nothing else */ >> +        asm volatile(".long 0x7c00071d | ((%0) << 16)" >> +                :: "r"(TM_CAUSE_SYSCALL|TM_CAUSE_PERSISTENT)); >> + >> +        /* >> +         * Userspace will never see the return value. Execution will >> +         * resume after the tbegin. of the aborted transaction with the >> +         * checkpointed register state. A context switch could occur >> +         * or signal delivered to the process before resuming the >> +         * doomed transaction context, but that should all be handled >> +         * as expected. >> +         */ >> +        return; >> +    } >> +#endif // CONFIG_PPC_TRANSACTIONAL_MEM > > nit: Better to follow standard comment practices. >         /* CONFIG_PPC_TRANSACTIONAL_MEM */ > Sure. >> +} >> +#define arch_enter_from_user_mode arch_enter_from_user_mode >>     #endif /* CONFIG_GENERIC_IRQ_ENTRY */ >>   #endif /* _ASM_PPC_ENTRY_COMMON_H */ >> diff --git a/arch/powerpc/include/asm/interrupt.h >> b/arch/powerpc/include/asm/interrupt.h >> index 56bc8113b8cde..6edf064a0fea2 100644 >> --- a/arch/powerpc/include/asm/interrupt.h >> +++ b/arch/powerpc/include/asm/interrupt.h >> @@ -138,6 +138,29 @@ static inline void nap_adjust_return(struct >> pt_regs *regs) >>   #endif >>   } >>   +static inline void booke_load_dbcr0(void) >> +{ >> +#ifdef CONFIG_PPC_ADV_DEBUG_REGS >> +       unsigned long dbcr0 = current->thread.debug.dbcr0; >> + >> +       if (likely(!(dbcr0 & DBCR0_IDM))) >> +               return; >> + >> +       /* >> +        * Check to see if the dbcr0 register is set up to debug. >> +        * Use the internal debug mode bit to do this. >> +        */ >> +       mtmsr(mfmsr() & ~MSR_DE); >> +       if (IS_ENABLED(CONFIG_PPC32)) { >> +               isync(); >> +               global_dbcr0[smp_processor_id()] = mfspr(SPRN_DBCR0); >> +       } >> +       mtspr(SPRN_DBCR0, dbcr0); >> +       mtspr(SPRN_DBSR, -1); >> +#endif >> +} >> + > > Please run checkpatch.pl --strict on the series and fix the simple > ones such as need to using tabs, spaces and alignments, extra lines etc. > Sure, will fix these. Thanks, Mukesh >> + >>   static inline void booke_restore_dbcr0(void) >>   { >>   #ifdef CONFIG_PPC_ADV_DEBUG_REGS >> diff --git a/arch/powerpc/kernel/interrupt.c >> b/arch/powerpc/kernel/interrupt.c >> index 0d8fd47049a19..2a09ac5dabd62 100644 >> --- a/arch/powerpc/kernel/interrupt.c >> +++ b/arch/powerpc/kernel/interrupt.c >> @@ -78,28 +78,6 @@ static notrace __always_inline bool >> prep_irq_for_enabled_exit(bool restartable) >>       return true; >>   } >>   -static notrace void booke_load_dbcr0(void) >> -{ >> -#ifdef CONFIG_PPC_ADV_DEBUG_REGS >> -    unsigned long dbcr0 = current->thread.debug.dbcr0; >> - >> -    if (likely(!(dbcr0 & DBCR0_IDM))) >> -        return; >> - >> -    /* >> -     * Check to see if the dbcr0 register is set up to debug. >> -     * Use the internal debug mode bit to do this. >> -     */ >> -    mtmsr(mfmsr() & ~MSR_DE); >> -    if (IS_ENABLED(CONFIG_PPC32)) { >> -        isync(); >> -        global_dbcr0[smp_processor_id()] = mfspr(SPRN_DBCR0); >> -    } >> -    mtspr(SPRN_DBCR0, dbcr0); >> -    mtspr(SPRN_DBSR, -1); >> -#endif >> -} >> - >>   static notrace void check_return_regs_valid(struct pt_regs *regs) >>   { >>   #ifdef CONFIG_PPC_BOOK3S_64 >