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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cbb8f0f58dfsm2314697a12.13.2026.07.23.01.16.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Jul 2026 01:16:54 -0700 (PDT) Message-ID: <214c704d-4979-4dc6-ac91-db672e792c22@oss.qualcomm.com> Date: Thu, 23 Jul 2026 16:16:47 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/2] Add CoreSight nodes for Qualcomm Shikra SoC To: Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Yuanfang Zhang , Mao Jinlong , Bjorn Andersson , Konrad Dybcio , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: <20260723-add-coresight-nodes-for-shikra-v1-0-992615f9ea15@oss.qualcomm.com> Content-Language: en-US From: Jie Gan In-Reply-To: <20260723-add-coresight-nodes-for-shikra-v1-0-992615f9ea15@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: HNgQ3dpmYsyR4-iwqdscdmlcVL59RfLe X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIzMDA4MiBTYWx0ZWRfXzRYhY61fDH+/ SKiYya7v4FiMxq6lE1MPLPvBFr05l5y8kfUW09aye86RmxiVyLZcDkVbmLhGsY9YvAeibM5myDH OwAQPLk5IEtQ+QUnw0ZTX2AI7l7hzcg= X-Proofpoint-GUID: HNgQ3dpmYsyR4-iwqdscdmlcVL59RfLe X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIzMDA4MiBTYWx0ZWRfX4f3C4fXykSHS W/SjCJ+9go6NRCv3RjFdv4GZtj+QwiWRldhPirlHRNAWE3Me8H5aP1hudWRUWwS+hMZeNSi7gr2 XsBiujPJJhRXDEk/9tjwPDh7ifGPQ+H4h2/FBt+UcX9Xi0MWOa9Xxgi5qcuqzQwJiWYbHE8OYRS dib+BH0XNdCXuoYRqnr7Sk0SwzKlgooTfThOoWjI3I9OQcXZmcPUBpwDMr6sWNeYpQBzY01iTe5 K09Ohu2LxOt79i3+LgYYoJ+iqnUmtgJ2w7EdOMO0aiPLqf6SJd/W174NKRrtGPkwAndXGfQ+nHk TI/9UQXrfqk0VN+WKWM78qKBY3Ho+/mVTs2t6y3e2dy23K8vvt3Kzp+jNZs6d4g+W0xswZmixr8 /43bwpt7UWulcvSlERCIRlGfOoNo5XVIYu7bJNFrwoCrK6/ev6G9QI+I5pkK/jzf9Qb2ZFRmyMG 6Rxe0WgZdcxJKdLmFVw== X-Authority-Analysis: v=2.4 cv=WNxPmHsR c=1 sm=1 tr=0 ts=6a61cdf8 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=7CQSdrXTAAAA:8 a=KKAkSRfTAAAA:8 a=_O3DOGVWAAAA:8 a=JfrnYn6hAAAA:8 a=nMW6oa_Obw0FX87ioUUA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 a=a-qgeE7W1pNrGK8U0ZQC:22 a=cvBusfyB2V15izCimMoJ:22 a=2TKV-7w1aU1AVAwN0oqT:22 a=1CNFftbPRP8L7MoqJWF3:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-23_02,2026-07-22_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 phishscore=0 impostorscore=0 suspectscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607230082 On 7/23/2026 9:46 AM, Jie Gan wrote: > This series adds the CoreSight debug and trace subsystem for the > Qualcomm Shikra SoC. > > The first patch adds a fallback compatible for the Shikra CTCU (CoreSight > Trace Control Unit). The CTCU on Shikra shares the same configuration as > the one on SA8775p, so "qcom,shikra-ctcu" falls back to the existing > "qcom,sa8775p-ctcu" compatible. > > The second patch adds the DT nodes describing the CoreSight topology on > Shikra, including the funnels, replicators, TMC sinks (ETR/ETF), STM, > per-core ETMs, CTIs, and the TPDM/TPDA trace collection blocks, along > with the CTCU and the dummy source/sink endpoints that model external > trace sources and the EUD sink. I just found the version number is wrong for the series, it should be V4. I have checked my b4 branch, confirmed the version number has been cleared by mistake. Will take care of it in the future. Thanks, Jie > > --- > Changes in V4: > - fix the wrong subject for the dt-binding patch > - Link to v3: https://lore.kernel.org/all/20260722-add-coresight-nodes-for-shikra-v3-0-1400a3454e9f@oss.qualcomm.com/ > > Changes in v3: > - add correct subsystem prefix in dt-binding subject. > - Link to v2: https://lore.kernel.org/r/20260715-add-coresight-nodes-for-shikra-v2-0-ebd485e39a51@oss.qualcomm.com > > Changes in v2: > - remove MMIO for the ETM devices. > - Link to v1: https://lore.kernel.org/r/20260714-add-coresight-nodes-for-shikra-v1-0-b1cf85962455@oss.qualcomm.com > > To: Suzuki K Poulose > To: Mike Leach > To: James Clark > To: Leo Yan > To: Rob Herring > To: Krzysztof Kozlowski > To: Conor Dooley > To: Tingwei Zhang > To: Yuanfang Zhang > To: Mao Jinlong > To: Bjorn Andersson > To: Konrad Dybcio > To: Paul Walmsley > To: Palmer Dabbelt > To: Albert Ou > To: Alexandre Ghiti > Cc: coresight@lists.linaro.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-arm-msm@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-riscv@lists.infradead.org > Signed-off-by: Jie Gan > > --- > Jie Gan (2): > dt-bindings: arm: qcom,coresight-ctcu: Add Shikra > arm64: dts: qcom: shikra: Add coresight nodes > > .../bindings/arm/qcom,coresight-ctcu.yaml | 1 + > arch/arm64/boot/dts/qcom/shikra.dtsi | 1295 ++++++++++++++++++++ > 2 files changed, 1296 insertions(+) > --- > base-commit: 290aaf24a551d5a0dce037e3fab30820f9113a10 > change-id: 20260722-add-coresight-nodes-for-shikra-5fb8a4b503d1 > > Best regards,