From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 886074F881 for ; Tue, 27 Jan 2026 07:30:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769499019; cv=none; b=hKOQPYYjATlAlynzYk6jB/VcsavDtxXNjK8gLgmm1GnCH9SQfzZGal9ON0Z07NGf4f/+Kw2cxe95tJSoaB40ROFw0grgOR7f2p3c98vkmzVtLhtycUnfH/eJJ1/GU75mhxGic2cFOJJnLbdR4Pgz+1JYijx1Y/owLjsC9TLfyT0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769499019; c=relaxed/simple; bh=bN0CxHwgBrWQ4YuhRSPDtYGhaL1ZIAjlhm7FEmMflfI=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=JDaQsUSPR4fixAcQK13ituUhWbxVd2Z559EHEWvgXzr2LFGpvFEmB16Dpu0lLqKmQXF5BZAWHROjgE7Xe7rxnwyj+spwN1ocS3iFXobiFPPbbUbnK43UQ6eLO+7U4wZl/1hIW4yIT2AsC046Llo0HqrpU6fFFpuJgIbvqRv0s5Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MdVKoISG; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MdVKoISG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1769499019; x=1801035019; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=bN0CxHwgBrWQ4YuhRSPDtYGhaL1ZIAjlhm7FEmMflfI=; b=MdVKoISGVGPz3fPDTGg1zDqZbcWLRQDjhVOyQJtcfR1O9fnqpbafeFHb 4YbuRfmXhSz0TjZefqG9kADiGwdjuq2uejn0yA1QpIbBe/NdtkzCVGNiQ xYkHensJZ3dh3nz/ModwbuLdgXrSwvzQxQgJmhq071ey9eqDiT36MkfGW 5jKExeKQpj+JzqY2vQw1akbrdD7WOTGlV4nXwA66HKF0MyuVLNfytnzvv OyUtavhROGTEGUFpEe//Qk9ffuTikZvkrsnaWWLLkY+k1F9/Egv3tvMsT v9y8Jlyrv3KcmahHO3LJMiN6bmGK7NX11mX0W93qZNsAlfp0d2Kqnqhoj A==; X-CSE-ConnectionGUID: g7nxuFvKSpaIF7OgOERIjg== X-CSE-MsgGUID: sJWgkN1aROi9y/3ei1r8Kg== X-IronPort-AV: E=McAfee;i="6800,10657,11683"; a="88101357" X-IronPort-AV: E=Sophos;i="6.21,256,1763452800"; d="scan'208";a="88101357" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2026 23:30:18 -0800 X-CSE-ConnectionGUID: yaMYLjyMQPimX0gW+FsBfQ== X-CSE-MsgGUID: GbrMsBA+TJOFg6GyFfCMJQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,256,1763452800"; d="scan'208";a="212763794" Received: from unknown (HELO [10.238.1.186]) ([10.238.1.186]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2026 23:30:14 -0800 Message-ID: <215bbfca-8f63-4f86-b992-5802350055a4@intel.com> Date: Tue, 27 Jan 2026 15:30:11 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6] sched/clock: Avoid false sharing for sched_clock_irqtime To: K Prateek Nayak , Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider Cc: linux-kernel@vger.kernel.org, Shrikanth Hegde , Benjamin Lei , Tim Chen , Tianyou Li References: <20260127044159.2254247-1-wangyang.guo@intel.com> <306a53a5-0b99-4e5a-810b-5aa4e86a72d1@amd.com> Content-Language: en-US From: "Guo, Wangyang" In-Reply-To: <306a53a5-0b99-4e5a-810b-5aa4e86a72d1@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/27/2026 2:30 PM, K Prateek Nayak wrote: > Hello Wangyang, > > On 1/27/2026 10:11 AM, Wangyang Guo wrote: >> --- a/kernel/sched/clock.c >> +++ b/kernel/sched/clock.c >> @@ -173,6 +173,7 @@ notrace static void __sched_clock_work(struct work_struct *work) >> scd->tick_gtod, __gtod_offset, >> scd->tick_raw, __sched_clock_offset); >> >> + disable_sched_clock_irqtime(); > > We can come here with !irqtime_enabled() but this is a slowpath so I > don't really mind calling disable_sched_clock_irqtime() unconditionally > here. Feel free to include: > > Reviewed-by: K Prateek Nayak > Tested-by: K Prateek Nayak > > Tested with a bunch of fake cases of sched_clock going unstable by > hacking the kernel and the irqtime was disabled correctly in both cases > - pre-lateinit and post-lateinit. I think we can put irqtime_enabled check in disable_sched_lock_irqtime() which will benefit in both scenario: void disable_sched_clock_irqtime(void) { - sched_clock_irqtime = 0; + if (irqtime_enabled()) + static_branch_disable(&sched_clock_irqtime); } v7: https://lore.kernel.org/all/20260127072509.2627346-1-wangyang.guo@intel.com/