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Add the > t-power-on-us property to the PCIe root ports so that this value is > correctly programmed during host initialization. > > Signed-off-by: Krishna Chaitanya Chundru > --- > arch/arm64/boot/dts/qcom/kodiak.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi > index f2da3706d5c8..54acc7d9bdea 100644 > --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi > +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi > @@ -2306,6 +2306,8 @@ pcie0_port: pcie@0 { > #address-cells = <3>; > #size-cells = <2>; > ranges; > + > + t-power-on-us = <80>; nit: please put it there in all patches: @@ -2316,6 +2316,8 @@ pcie0_port: pcie@0 { phys = <&pcie0_phy>; + t-power-on-us = <80>; + #address-cells = <3>; #size-cells = <2>; ranges; and re-run the list of SoCs that need it (LLM should do at least the first part for you in ~20 seconds) Konrad