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Mon, 19 Oct 2026 10:23:18 -0700 (PDT) Received: from [192.168.1.3] ([37.18.141.193]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e1d838dd6sm184529f8f.58.2026.10.19.10.23.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Oct 2026 10:23:18 -0700 (PDT) Message-ID: <21f58af0-fa3f-41c5-ab03-216c60fbe2f1@linaro.org> Date: Mon, 19 Oct 2026 18:23:16 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/6] perf jevents: Add NVIDIA Tegra410 uncore PMU events and metrics To: Besar Wicaksono , acme@kernel.org, namhyung@kernel.org, irogers@google.com Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, vsethi@nvidia.com, rwiley@nvidia.com, skelley@nvidia.com, mochs@nvidia.com, rajjoshi@nvidia.com, treding@nvidia.com, jonathanh@nvidia.com, john.garry@linux.dev, will@kernel.org, mike.leach@arm.com, leo.yan@linux.dev, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, adrian.hunter@intel.com, ctshao@google.com References: <20261019164241.403644-1-bwicaksono@nvidia.com> Content-Language: en-US From: James Clark In-Reply-To: <20261019164241.403644-1-bwicaksono@nvidia.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 19/10/2026 17:42, Besar Wicaksono wrote: > Add event aliases and derived metrics for the NVIDIA Tegra410 uncore > PMUs. > > The series covers the UCF, PCIe, PCIe target, CPU memory latency, and > chip-to-chip interconnect PMUs. It provides symbolic names for the raw > event encodings and metrics for bandwidth, frequency, and average read > latency. > > Patch 1 fixes a jevents ordering problem found with this layout: the > uncore events live in arch/arm64/nvidia/t410/sys/, next to the T410 core > events, and without the fix jevents puts the core tlb.json (which sorts > after "sys") into the sys table, so its events are lost from perf list > and perf stat. > > Besar Wicaksono (6): > perf jevents: Process model files before sys subdirectories > perf jevents: Add support for NVIDIA Tegra410 UCF PMU aliasing > perf jevents: Add support for NVIDIA Tegra410 PCIE PMU aliasing > perf jevents: Add support for NVIDIA Tegra410 PCIE-TGT PMU aliasing > perf jevents: Add support for NVIDIA Tegra410 CPU Memory Latency PMU > aliasing > perf jevents: Add support for NVIDIA Tegra410 C2C PMU aliasing > > .../arm64/nvidia/t410/sys/uncore-cpu_mem.json | 48 ++ > .../arm64/nvidia/t410/sys/uncore-nvclink.json | 75 ++ > .../arm64/nvidia/t410/sys/uncore-nvdlink.json | 48 ++ > .../nvidia/t410/sys/uncore-nvlink_c2c.json | 129 ++++ > .../arm64/nvidia/t410/sys/uncore-pcie.json | 247 +++++++ > .../nvidia/t410/sys/uncore-pcie_tgt.json | 93 +++ > .../arm64/nvidia/t410/sys/uncore-ucf.json | 693 ++++++++++++++++++ > tools/perf/pmu-events/jevents.py | 4 +- > 8 files changed, 1336 insertions(+), 1 deletion(-) > create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/sys/uncore-cpu_mem.json > create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/sys/uncore-nvclink.json > create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/sys/uncore-nvdlink.json > create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/sys/uncore-nvlink_c2c.json > create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/sys/uncore-pcie.json > create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/sys/uncore-pcie_tgt.json > create mode 100644 tools/perf/pmu-events/arch/arm64/nvidia/t410/sys/uncore-ucf.json > Reviewed-by: James Clark