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Fri, 16 Aug 2024 12:04:02 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47GC41OF017819 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Aug 2024 12:04:01 GMT Received: from [10.216.27.9] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 16 Aug 2024 05:03:55 -0700 Message-ID: <21fa1207-be83-ffdc-deab-81c070bb94c7@quicinc.com> Date: Fri, 16 Aug 2024 17:33:43 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH v2 00/16] Add cmd descriptor support To: Caleb Connolly , , , , , , , , , , , , , , , , , , CC: , , References: <20240815085725.2740390-1-quic_mdalam@quicinc.com> Content-Language: en-US From: Md Sadre Alam In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: rr_TjtZmS9cGzTqFnZeuP3hLllP6xUtC X-Proofpoint-GUID: rr_TjtZmS9cGzTqFnZeuP3hLllP6xUtC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-16_03,2024-08-16_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1011 mlxlogscore=999 malwarescore=0 lowpriorityscore=0 phishscore=0 spamscore=0 bulkscore=0 suspectscore=0 adultscore=0 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408160088 On 8/15/2024 6:38 PM, Caleb Connolly wrote: > Hi, > > A note for future patches, please scope your cover letter subject: > > "dmaengine: qcom: bam_dma: add cmd descriptor support" Sure will add this in next patch. > > On 15/08/2024 10:57, Md Sadre Alam wrote: >> This series of patches will add command descriptor >> support to read/write crypto engine register via >> BAM/DMA >> >> We need this support because if there is multiple EE's >> (Execution Environment) accessing the same CE then there >> will be race condition. To avoid this race condition >> BAM HW hsving LOC/UNLOCK feature on BAM pipes and this >> LOCK/UNLOCK will be set via command descriptor only. >> >> Since each EE's having their dedicated BAM pipe, BAM allows >> Locking and Unlocking on BAM pipe. So if one EE's requesting >> for CE5 access then that EE's first has to LOCK the BAM pipe >> while setting LOCK bit on command descriptor and then access >> it. After finishing the request EE's has to UNLOCK the BAM pipe >> so in this way we race condition will not happen. >> >> tested with "tcrypt.ko" and "kcapi" tool. >> >> Need help to test these all the patches on msm platform > > DT changes here are only for a few IPQ platforms, please explain in the cover letter if this is some IPQ specific feature which doesn't exist on other platforms, or if you're only enabling it on IPQ. This feature is BAM hardware feature so its applicable for all the QCOM Soc where bam is there. Its not IPQ specific. Will add all the explanation in cover letter in next patch > > Some broad strokes testing instructions (at the very least) and requirements (testing on what hardware?) aren't made obvious at all here. Sure will update in cover letter in next patch. > > Kind regards, >> >> v2: >>   * Addressed all the comments from v1 >>   * Added the dt-binding >>   * Added locking/unlocking mechanism in bam driver >> >> v1: >>   * https://lore.kernel.org/lkml/20231214114239.2635325-1-quic_mdalam@quicinc.com/ >>   * Initial set of patches for cmd descriptor support >> >> Md Sadre Alam (16): >>    dt-bindings: dma: qcom,bam: Add bam pipe lock >>    dmaengine: qcom: bam_dma: add bam_pipe_lock dt property >>    dmaengine: qcom: bam_dma: add LOCK & UNLOCK flag support >>    crypto: qce - Add support for crypto address read >>    crypto: qce - Add bam dma support for crypto register r/w >>    crypto: qce - Convert register r/w for skcipher via BAM/DMA >>    crypto: qce - Convert register r/w for sha via BAM/DMA >>    crypto: qce - Convert register r/w for aead via BAM/DMA >>    crypto: qce - Add LOCK and UNLOCK flag support >>    crypto: qce - Add support for lock aquire,lock release api. >>    crypto: qce - Add support for lock/unlock in skcipher >>    crypto: qce - Add support for lock/unlock in sha >>    crypto: qce - Add support for lock/unlock in aead >>    arm64: dts: qcom: ipq9574: enable bam pipe locking/unlocking >>    arm64: dts: qcom: ipq8074: enable bam pipe locking/unlocking >>    arm64: dts: qcom: ipq6018: enable bam pipe locking/unlocking >> >>   .../devicetree/bindings/dma/qcom,bam-dma.yaml |   8 + >>   arch/arm64/boot/dts/qcom/ipq6018.dtsi         |   1 + >>   arch/arm64/boot/dts/qcom/ipq8074.dtsi         |   1 + >>   arch/arm64/boot/dts/qcom/ipq9574.dtsi         |   1 + >>   drivers/crypto/qce/aead.c                     |   4 + >>   drivers/crypto/qce/common.c                   | 142 +++++++---- >>   drivers/crypto/qce/core.c                     |  13 +- >>   drivers/crypto/qce/core.h                     |  12 + >>   drivers/crypto/qce/dma.c                      | 232 ++++++++++++++++++ >>   drivers/crypto/qce/dma.h                      |  26 +- >>   drivers/crypto/qce/sha.c                      |   4 + >>   drivers/crypto/qce/skcipher.c                 |   4 + >>   drivers/dma/qcom/bam_dma.c                    |  14 +- >>   include/linux/dmaengine.h                     |   6 + >>   14 files changed, 424 insertions(+), 44 deletions(-) >> >