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Tue, 13 Aug 2024 08:59:44 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47D8xhDP021875 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 13 Aug 2024 08:59:43 GMT Received: from [10.239.132.150] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 13 Aug 2024 01:59:37 -0700 Message-ID: <2229cc1a-0fa0-4291-874e-43b31f82ef50@quicinc.com> Date: Tue, 13 Aug 2024 16:59:34 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] arm64: dts: qcom: sa8775p-ride: Add QCS9100 compatible To: Krzysztof Kozlowski , Tingwei Zhang , Tengfei Fan , "Bjorn Andersson" , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , References: <20240806-add_qcs9100_soc_id-v1-0-04d14081f304@quicinc.com> <20240806-add_qcs9100_soc_id-v1-4-04d14081f304@quicinc.com> <90eae361-7d5d-440f-a85d-dfd81b384fe7@kernel.org> <4a350e94-3c95-48e1-9ea8-ced483c1aa45@quicinc.com> <14ec06bd-0c27-4930-8bce-d3f5b68067ed@kernel.org> <9323127a-e6b5-4835-afa0-4ce0086fd9d1@kernel.org> <0d1c44b9-3d5f-4d93-af64-1756e52f4fe3@quicinc.com> <47c966c7-8736-44a2-8ec7-4d7989efa9cd@kernel.org> <72b2d710-a7cb-45cf-9dad-e9fbd876697b@quicinc.com> From: "Aiqun Yu (Maria)" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: BF6k1lOAP8RYqrrHq8EUNjZCnsof3ufv X-Proofpoint-GUID: BF6k1lOAP8RYqrrHq8EUNjZCnsof3ufv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-13_01,2024-08-13_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1011 mlxlogscore=989 malwarescore=0 lowpriorityscore=0 phishscore=0 spamscore=0 bulkscore=0 suspectscore=0 adultscore=0 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408130063 On 8/13/2024 4:34 PM, Krzysztof Kozlowski wrote: > On 12/08/2024 09:07, Tingwei Zhang wrote: >> 在 8/12/2024 2:15 PM, Krzysztof Kozlowski 写道: >>> On 12/08/2024 04:16, Tingwei Zhang wrote: >>>> On 8/8/2024 7:05 PM, Krzysztof Kozlowski wrote: >>>>> On 07/08/2024 13:04, Tingwei Zhang wrote: >>>>>> On 8/7/2024 5:35 PM, Krzysztof Kozlowski wrote: >>>>>>> On 07/08/2024 11:17, Tengfei Fan wrote: >>>>>>>> >>>>>>>> >>>>>>>> On 8/7/2024 3:28 PM, Krzysztof Kozlowski wrote: >>>>>>>>> On 06/08/2024 06:19, Tengfei Fan wrote: >>>>>>>>>> Add QCS9100 compatible in sa8775p ride and sa8775p ride r3 board DTS. >>>>>>>>>> QCS9100 references SA8775p, they share the same SoC DTSI and board DTS. >>>>>>>>>> >>>>>>>>> >>>>>>>>> I don't understand this. You claim here that QCS9100 references SA8775p >>>>>>>>> but your diff says other way: SA8775p references QCS9100. >>>>>>>>> >>>>>>>>> Sorry, that's confusing. >>>>>>>>> >>>>>>>>> Best regards, >>>>>>>>> Krzysztof >>>>>>>>> >>>>>>>> >>>>>>>> I will update the compatible as follows to indicate that QCS9100 >>>>>>>> references SA8775p. >>>>>>>> >>>>>>>> compatible = "qcom,sa8775p-ride", "qcom,qcs9100", "qcom,sa8775p"; >>>>>>> >>>>>>> Is this still correct, though? sa8775p won't come with qcs9100 SoC. >>>>>> We have a new board. Hardware is same as sa877p-ride except sa8775p is >>>>>> replaced with qcs9100. We add qcs9100 SoC compatible to sa8775p-ride >>>>> >>>>> Does "new board" mean that "old board" disappears? No users to care >>>>> about it? Or just the existing board is being changed (like new revision)? >>>> >>>> We will support both boards. Sa8775p-ride board with sa8775p chipset and >>>> sa8775p-ride board with qcs9100 chipset. Both of them can be used for >>>> development. >>> >>> Patch does something else then - changes compatibles for the existing >>> (old) board. >> >> Can you educate us the right way to add the qcs9100 SoC support in >> sa8775p-ride board? We don't want to duplicate whole device tree file >> since all the hardwares are same except the SoC, so we add qcs9100 SoC >> compatible to sa8775p-ride board and still keep sa8775p SoC compatible. > > Split board DTS into shared DTSI (just don't forget about proper > -M/-C/-B arguments for format-patch) and include it in relevant boards. > You also need new SoC DTSI. This will be unusual code, but it matches > what you want to achieve. If we create two additional DTSs, a total of four DTBs will be generated. Should we update the current board DTSs (sa8775p-ride-r3.dts and sa8775p-ride.dts) to support the pin-to-pin compatible QCS9100 and SA8775p SoCs? Considering the higher usage of QCS9100 boards in IoT compared to SA8775p in automotive for these DTBs, perhaps we should prioritize the 'qcom,qcs9100' compatibility before 'qcom,sa8775p'. > > Best regards, > Krzysztof > -- Thx and BRs, Aiqun(Maria) Yu