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Miller" CC: Saeed Mahameed , Leon Romanovsky , Mark Bloch , Akiva Goldberger , , , , Gal Pressman , Dragos Tatulea , Simon Horman References: <20260518071356.345723-1-tariqt@nvidia.com> <20260518071356.345723-4-tariqt@nvidia.com> Content-Language: en-US From: Moshe Shemesh In-Reply-To: <20260518071356.345723-4-tariqt@nvidia.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002310:EE_|MN2PR12MB4078:EE_ X-MS-Office365-Filtering-Correlation-Id: c35fbb28-c235-4260-2710-08deb5bf0142 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|7416014|376014|1800799024|4143699003|18002099003|11063799006|22082099003|56012099003; X-Microsoft-Antispam-Message-Info: Z7BW9rOAHlZadSFilVF0EGO/Q+/a8k8f/9/fkXwY1ADc+1PRoxs1n1+LsB3DV+BD+L5O4lxb0G9aH2t81ar1/HvXdIcaAWhYNAr0TMsK5RsfIHFnldx6ZfTbU8qkOJFxlIl8ctnMfiQGF7WoyKhnaIsTm1eCuMFeFoLxEi+gOgdlmR+mU84xHk7miHHVXvzy609o010KhRwn16pqJ5S0ES22MMjXBeq0tKHf2adV85lzTwDKJzlFA9s/J6/72c5F6P/pM2Dfq9L4UdniXnF2eevw/PILMUfoVI+4xkTEh/3+eelGriyWCnijXMoa3IuK2bZXr57eNEhVZQkAkifZA+dEIN0SsEjnZb5aVP42zhNQrJbhnT3Lz02Iclc6WP/21QoC+seLlZ4SoO0QphEhT1NxEbPLAj1UITLzz1bY/Xjcr112f9SWkRJuUapN/RbAqMEW6QfV8Ho1SGb+Td4xAZCZpu39lNTCYrJEUlrhBIEefozCzgeXfNOi3RBpWDmCnZ/M20qNQ01HCjWUResKR+bGRetokOKvT+iPsQKWqSa8zxyUHnjRLwC0T32N7L4+h08HcyFRx/SNwoVYz5mnhrT4dlI9XJButHpItOFYz5L9izSSxehie35BM/XwGYUaTc4ChrfB09nFBL7WbKHwpv59kDgiZyopFNCIQF3oEL/gxMdHk2He6Z4S5srPMYajC/r1fcFJvvcxgJ0GncvfzwfeWuycawSlFUtDsJMSoOo= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(7416014)(376014)(1800799024)(4143699003)(18002099003)(11063799006)(22082099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YwCg/4L4ItKHBpcHKxLJBF4aTB4YODoWeimINM4Ud8Q4RJOCGwKUHSpbVha8uLH3WBsmBV7QRIScs0iW6LYvEG5xd6hO8yGfAqup2P04nuUFn27iE9JcB4Gjc+X1NMeyfl18esrBTL9uaq7BpEEw+fRqafs8c/WihhiO+eyrb4yQHRHdYCw+zlS63CNuxiXBl+Mrlr2oZiH7RcKXVepHwG46iWAkcM1WNVnYSZSZ6ApqaShhcTeZhjuN91NLUrsO014iseI42geacwb93YYvQxEsCwn0hZgeP7zSGW5ORptvYdFZYmIiwQhL+D1Lg30EsEN6kocuNioNERwsEsCkm6AG9EXGpsTDyhCiHm5Y4Ex3cNkTKTz4rrokizGxiMNBydyLCbgVoQTBkZmgJzfeSyNpDdC6qRapQe5GrER+4Q4xMaZ9ZZCsi5a97YA1nhCo X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 15:55:09.7262 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c35fbb28-c235-4260-2710-08deb5bf0142 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002310.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4078 On 5/18/2026 10:13 AM, Tariq Toukan wrote: > From: Moshe Shemesh > > IPsec eswitch offload operations and the enabled_ipsec_vf_count counter > are intended for VF vports only. Replace the MLX5_VPORT_HOST_PF checks > with mlx5_eswitch_is_vf_vport() to properly identify VF vports, as > preparation for adding another type of PF vports. > > Signed-off-by: Moshe Shemesh > Signed-off-by: Tariq Toukan > --- > drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c | 2 +- > drivers/net/ethernet/mellanox/mlx5/core/eswitch.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c > index 4811b60ea430..b830ccd91e62 100644 > --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c > +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c > @@ -209,7 +209,7 @@ static int esw_ipsec_vf_offload_set_bytype(struct mlx5_eswitch *esw, struct mlx5 > struct mlx5_core_dev *dev = esw->dev; > int err; > > - if (vport->vport == MLX5_VPORT_HOST_PF) > + if (!mlx5_eswitch_is_vf_vport(esw, vport->vport)) > return -EOPNOTSUPP; > > if (type == MLX5_ESW_VPORT_IPSEC_CRYPTO_OFFLOAD) { > diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c > index 8b62dde7eb70..9a7de7c9a667 100644 > --- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c > +++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c > @@ -958,7 +958,7 @@ int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, struct mlx5_vport *vport, > /* Sync with current vport context */ > vport->enabled_events = enabled_events; > vport->enabled = true; > - if (vport->vport != MLX5_VPORT_HOST_PF && > + if (mlx5_eswitch_is_vf_vport(esw, vport_num) && > (vport->info.ipsec_crypto_enabled || vport->info.ipsec_packet_enabled)) > esw->enabled_ipsec_vf_count++; > Sashiko.dev says: " This isn't a regression introduced by this patch, but is it possible for enabled_ipsec_vf_count to leak in the error path?" As it says, pre-existing bug, not related to this patch change. I will have a separate patch to fix that. > @@ -1020,7 +1020,7 @@ void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, struct mlx5_vport *vport) > mlx5_esw_vport_vhca_id_unmap(esw, vport); > } > > - if (vport->vport != MLX5_VPORT_HOST_PF && > + if (mlx5_eswitch_is_vf_vport(esw, vport_num) && > (vport->info.ipsec_crypto_enabled || vport->info.ipsec_packet_enabled)) > esw->enabled_ipsec_vf_count--; > Sashiko.dev says: " This isn't a regression introduced by this patch, but does this logic handle the case where both crypto and packet offloads are enabled on a single VF via devlink? " Same here.