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[86.58.126.118]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a3dd3391sm124921405e9.1.2026.02.22.04.30.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Feb 2026 04:30:34 -0800 (PST) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: linux-kernel@vger.kernel.org, Aleksandr Shubin Cc: Aleksandr Shubin , Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Philipp Zabel , Lukas Schmid , Cheo Fusi , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org Subject: Re: [PATCH v13 3/3] riscv: dts: allwinner: d1: Add pwm node Date: Sun, 22 Feb 2026 13:30:32 +0100 Message-ID: <2265500.irdbgypaU6@jernej-laptop> In-Reply-To: <20260221183609.95403-4-privatesub2@gmail.com> References: <20260221183609.95403-1-privatesub2@gmail.com> <20260221183609.95403-4-privatesub2@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne sobota, 21. februar 2026 ob 19:35:53 Srednjeevropski standardni =C4=8Da= s je Aleksandr Shubin napisal(a): > D1 and T113s contain a pwm controller with 8 channels. > This controller is supported by the sun8i-pwm driver. >=20 > Add a device tree node for it. >=20 > Signed-off-by: Aleksandr Shubin > --- > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) >=20 > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/ris= cv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > index 63e252b44973..8e38a0d95f5a 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -193,6 +193,19 @@ uart3_pb_pins: uart3-pb-pins { > }; > }; > =20 > + pwm: pwm@2000c00 { > + compatible =3D "allwinner,sun20i-d1-pwm"; > + reg =3D <0x02000c00 0x400>; > + clocks =3D <&ccu CLK_BUS_PWM>, > + <&dcxo>, > + <&ccu CLK_APB0>; > + clock-names =3D "bus", "hosc", "apb"; > + resets =3D <&ccu RST_BUS_PWM>; > + status =3D "disabled"; Move status at the bottom. > + #pwm-cells =3D <0x3>; Just use decimal format. Best regards, Jernej > + allwinner,npwms =3D <8>; > + }; > + > ccu: clock-controller@2001000 { > compatible =3D "allwinner,sun20i-d1-ccu"; > reg =3D <0x2001000 0x1000>; >=20