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([2600:8803:e7e4:500:3533:aa22:9a69:df1c]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-448db93e2a4sm230186fac.3.2026.06.29.09.43.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Jun 2026 09:43:34 -0700 (PDT) Message-ID: <22e1e1c2-659c-4991-857c-b38d66769c7e@baylibre.com> Date: Mon, 29 Jun 2026 11:43:33 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/7] dt-bindings: iio: adc: Add TI ADS126x ADC family To: Kurt Borja , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260628-ads126x-v2-0-4b1b231325ba@gmail.com> <20260628-ads126x-v2-1-4b1b231325ba@gmail.com> <946a30c9-01e9-42f1-bd2b-b7934fda85cf@baylibre.com> Content-Language: en-US From: David Lechner In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/29/26 11:27 AM, Kurt Borja wrote: > On Mon Jun 29, 2026 at 9:21 AM -05, David Lechner wrote: >> On 6/28/26 2:12 PM, Kurt Borja wrote: >>> On Sun Jun 28, 2026 at 10:45 AM -05, David Lechner wrote: >>>> On 6/28/26 12:36 AM, Kurt Borja wrote: >>>>> The ADS1262 and ADS1263 are 32-bit, 38.4-kSPS delta-sigma ADCs with an >>>>> integrated PGA, internal reference, excitation and burn-out current >>>>> sources for sensor biasing and diagnostics. The ADS1263 adds a second, >>>>> 24-bit delta-sigma ADC (ADC2) for background measurements. >>>>> >> >> ... >> >>>>> + >>>>> +patternProperties: >>>>> + "^channel@[0-9]+$": >>>>> + $ref: /schemas/iio/adc/adc.yaml# >>>>> + unevaluatedProperties: false >>>>> + >>>>> + properties: >>>>> + reg: >>>>> + maxItems: 1 >>>>> + >>>> >>>> If we want to allow single-ended/pseudo-differential inputs, then we should >>>> also allow single-channel (positive pin) and common-mode-channel (negative >>>> pin) properties. >>>> >>>> This will also require additional common-mode--supply properties to allow >>>> for the negative pin connected to something other than GND. >>> >>> Ah interesting. Why the N though? wouldn't a single supply connected to >>> AINCOM be enough here? >> >> In theory, any AINx could be a common mode input by connecting it to >> a constant voltage supply. > > Technically yes, but there is a pin named AINCOM intended for this > purpose. Can we do a simplification here? I propose having > > common-mode-channel: > /* AINCOM pin */ > const: 10 > > That way we would only need one common-mode-supply. Would that be okay? > Ideally, we shouldn't limit how the chip can be wired up in the devicetree bindings. It doesn't mean that we have to implement everything in the driver though.