Re: [PATCH 2/3] dma: arm-dma350: add support for shared interrupt mode

[Jun Guo <jun.guo@cixtech.com>]

On 11/17/2025 2:13 PM, Krzysztof Kozlowski wrote:
> On 17/11/2025 02:59, Jun Guo wrote:
>> - The arm dma350 controller's hardware implementation varies: some
> That's not a list. Look at git history to learn how to write expected
> commit messages.
> 
>>   designs dedicate a separate interrupt line for each channel, while
>>   others have all channels sharing a single interrupt.This patch adds
>>   support for the hardware design where all DMA channels share a
>>   single interrupt.
>>
>> Signed-off-by: Jun Guo<jun.guo@cixtech.com>
>> ---
>>   drivers/dma/ar
> 
> 
>> @@ -526,7 +593,7 @@ static void d350_free_chan_resources(struct dma_chan *chan)
>>   static int d350_probe(struct platform_device *pdev)
>>   {
>>        struct device *dev = &pdev->dev;
>> -     struct d350 *dmac;
>> +     struct d350 *dmac = NULL;
>>        void __iomem *base;
>>        u32 reg;
>>        int ret, nchan, dw, aw, r, p;
>> @@ -556,6 +623,7 @@ static int d350_probe(struct platform_device *pdev)
>>                return -ENOMEM;
>>
>>        dmac->nchan = nchan;
>> +     dmac->base = base;
>>
>>        reg = readl_relaxed(base + DMAINFO + DMA_BUILDCFG1);
>>        dmac->nreq = FIELD_GET(DMA_CFG_NUM_TRIGGER_IN, reg);
>> @@ -582,6 +650,26 @@ static int d350_probe(struct platform_device *pdev)
>>        dmac->dma.device_issue_pending = d350_issue_pending;
>>        INIT_LIST_HEAD(&dmac->dma.channels);
>>
>> +     /* Cix Sky1 has a common host IRQ for all its channels. */
>> +     if (of_device_is_compatible(pdev->dev.of_node, "cix,sky1-dma-350")) {
> No, see further
> 
>> +             int host_irq = platform_get_irq(pdev, 0);
>> +
>> +             if (host_irq < 0)
>> +                     return dev_err_probe(dev, host_irq,
>> +                                          "Failed to get IRQ\n");
>> +
>> +             ret = devm_request_irq(&pdev->dev, host_irq, d350_global_irq,
>> +                                    IRQF_SHARED, DRIVER_NAME, dmac);
>> +             if (ret)
>> +                     return dev_err_probe(
>> +                             dev, ret,
>> +                             "Failed to request the combined IRQ %d\n",
>> +                             host_irq);
>> +
>> +             /* Combined Non-Secure Channel Interrupt Enable */
>> +             writel_relaxed(INTREN_ANYCHINTR_EN, dmac->base + DMANSECCTRL);
>> +     }
>> +
>>        /* Would be nice to have per-channel caps for this... */
>>        memset = true;
>>        for (int i = 0; i < nchan; i++) {
>> @@ -595,10 +683,16 @@ static int d350_probe(struct platform_device *pdev)
>>                        dev_warn(dev, "No command link support on channel %d\n", i);
>>                        continue;
>>                }
>> -             dch->irq = platform_get_irq(pdev, i);
>> -             if (dch->irq < 0)
>> -                     return dev_err_probe(dev, dch->irq,
>> -                                          "Failed to get IRQ for channel %d\n", i);
>> +
>> +             if (!of_device_is_compatible(pdev->dev.of_node,
>> +                                          "cix,sky1-dma-350")) {
> No, use driver match data for that. Sprinkling compatibles everywhere
> does not scale.
> 
I have another question: by "driver match data", are you referring to 
the data variable in the struct of_device_id?
> Also, this is in contrary with the binding, which did not say your
> device has no interrupts.
I need to clarify here: the issue with my chip platform is not the lack 
of interrupts, but that all DMA channels share a single interrupt. The 
current driver, however, defaults to assigning an individual interrupt 
for each DMA channel.