Re: [PATCH] drm: bridge: fsl-ldb: fixup mode on freq mismatch

[Marek Vasut <marex@denx.de>]

On 12/2/24 6:03 PM, Nikolaus Voss wrote:
> On 02.12.2024 13:56, Marek Vasut wrote:
>> On 12/2/24 7:32 AM, Liu Ying wrote:
>>> On 11/27/2024, Nikolaus Voss wrote:
>>>> LDB clock has to be a fixed multiple of the pixel clock.
>>>> As LDB and pixel clock are derived from different clock sources
>>>> (at least on imx8mp), this constraint cannot be satisfied for
>>>> any pixel clock, which leads to flickering and incomplete
>>>> lines on the attached display.
>>>>
>>>> To overcome this, check this condition in mode_fixup() and
>>>> adapt the pixel clock accordingly.
>>>>
>>>> Cc: <stable@vger.kernel.org>
>>>
>>> It looks like stable is not effectively Cc'ed.
>>> Need a Fixes tag?
>> Isn't this fix effectively superseded by series
>>
>> [PATCH 0/5] clk: Fix simple video pipelines on i.MX8
>>
>> ?
> 
> Maybe. I wasn't aware of the series. Looking at it, the change is
> rather complex and not suitable for the stable series.
> 
> My intention was to get a simple fix which doesn't potentially
> break anything. It wouldn't even break the patch series you mentioned.
I know, the proper fix is indeed complex and not yet fully figured out.

The fix for stable for existing hardware is similar to this commit I think:

4fbb73416b10 ("arm64: dts: imx8mp-phyboard-pollux: Set Video PLL1 
frequency to 506.8 MHz")