From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964959AbdAIKov (ORCPT ); Mon, 9 Jan 2017 05:44:51 -0500 Received: from foss.arm.com ([217.140.101.70]:50496 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754690AbdAIKnL (ORCPT ); Mon, 9 Jan 2017 05:43:11 -0500 Subject: Re: [PATCH v3 4/9] arm64: cpufeature: Document the rules of safe value for features To: Catalin Marinas References: <1483552147-9605-1-git-send-email-suzuki.poulose@arm.com> <1483552147-9605-5-git-send-email-suzuki.poulose@arm.com> <20170106123011.GB12863@e104818-lin.cambridge.arm.com> Cc: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, ryan.arnold@linaro.org, sid@reserved-bit.com, aph@redhat.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, adhemerval.zanella@linaro.org, dave.martin@arm.com From: Suzuki K Poulose Message-ID: <2338875a-6a5b-ba9e-59fe-d681091c2923@arm.com> Date: Mon, 9 Jan 2017 10:43:07 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: <20170106123011.GB12863@e104818-lin.cambridge.arm.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/01/17 12:30, Catalin Marinas wrote: > On Wed, Jan 04, 2017 at 05:49:02PM +0000, Suzuki K. Poulose wrote: >> --- a/arch/arm64/include/asm/cpufeature.h >> +++ b/arch/arm64/include/asm/cpufeature.h >> @@ -29,7 +29,21 @@ >> #include >> #include >> >> -/* CPU feature register tracking */ >> +/* >> + * CPU feature register tracking >> + * >> + * The safe value of a CPUID feature field is dependent on the implications >> + * of the values assigned to it by the architecture. Based on the relationship >> + * between the values, the features are classified into 3 types. >> + * >> + * a) LOWER_SAFE - The value 'n+1' indicates, value 'n' and some >> + * additional features. (where n >= 0). The smaller value (n) is >> + * considered safer in this case. >> + * b) HIGHER_SAFE - The value 'n+1' is safer than 'n' (for n>= 0). >> + * c) EXACT - If the values of the feature don't have any relationship, >> + * a predefined safe value is used. >> + */ > > I don't think this text fully describes what is actually compared. You > could say something that the lowest value of all the CPUs is chosen for > LOWER_SAFE, highest for HIGHER_SAFE and it is expected that all CPUs > have the same value for a field when EXACT is specified. Ok. I have changed it as below : /* * CPU feature register tracking * * The safe value of a CPUID feature field is dependent on the implications * of the values assigned to it by the architecture. Based on the relationship * between the values, the features are classified into 3 types - LOWER_SAFE, * HIGHER_SAFE and EXACT. * * The lowest value of all the CPUs is chosen for LOWER_SAFE and highest * for HIGHER_SAFE. It is expected that all CPUs have the same value for * a field when EXACT is specified, failing which, the safe value specified * in the table is chosen. */ Suzuki