Re: [PATCH RFC V3 00/11] irqchip: Add LoongArch-related irqchip drivers

[Jianmin Lv <lvjianmin@loongson.cn>]

On 2022/6/15 上午12:25, Marc Zyngier wrote:
> On Sat, 11 Jun 2022 15:02:35 +0100,
> Jianmin Lv <lvjianmin@loongson.cn> wrote:
>>
>> LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V.
>> LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit
>> version (LA32S) and a 64-bit version (LA64). LoongArch use ACPI as its
>> boot protocol LoongArch-specific interrupt controllers (similar to APIC)
>> are already added in the ACPI Specification 6.5(which may be published in
>> early June this year and the board is reviewing the draft).
> 
> Can you please make an effort to send patches in coherent way? Here's
> what I see in my email reader:
> 
> [PATCH RFC V2 00/10] irqchip: Add LoongArch-related irqchip drivers
> +[PATCH RFC V3 01/11] APCI: irq: Add support for multiple GSI domains
> +[PATCH RFC V3 02/11] genirq/generic_chip: export irq_unmap_generic_chip
> +[PATCH RFC V3 03/11] irqchip: Adjust Kconfig for Loongson
> +[PATCH RFC V3 04/11] irqchip: Add LoongArch CPU interrupt controller support
> \[PATCH RFC V3 05/11] irqchip: create library file for LoongArch irqchip driver
> [PATCH RFC V3 06/11] irqchip/loongson-pch-pic: Add ACPI init support
> +[PATCH RFC V3 07/11] irqchip/loongson-pch-msi: Add ACPI init support
> +[PATCH RFC V3 08/11] irqchip/loongson-htvec: Add ACPI init support
> +[PATCH RFC V3 09/11] irqchip/loongson-liointc: Add ACPI init support
> +[PATCH RFC V3 10/11] irqchip: Add Loongson Extended I/O interrupt controller support
> \[PATCH RFC V3 11/11] irqchip: Add Loongson PCH LPC controller support
> [PATCH RFC V3 00/11] irqchip: Add LoongArch-related irqchip drivers
> 
> Three threads, with inconsistent version numbers, inconsistent patch
> numbering, with a split in the middle, and this final cover letter
> that isn't followed by anything.  If you make a mistake, that's
> fine. Fix it, and resend the series properly, possibly with a new
> version number. Pro tip: you should only use 'git send-email', and
> only once to send all your patches after having written the cover
> letter. If you have to do anything else, you're doing something
> wrong.
> 

Yes, Marc, thanks for your guidance. It's my mistake that I sent an old 
cover letter when sending the patch series， so I sent a correct cover 
letter after I found the mistake. I'll do it carefully in future.

> Also, please drop this 'RFC', as we're way past the RFC stage (to me,
> RFC means "I don't know what I'm doing yet, this is not ready to be
> merged").
> 

Ok, I'll resend the series properly without 'RFC'.


> [...]
> 
>> Jianmin Lv (10):
>>    APCI: irq: Add support for multiple GSI domains
> 
> I'm usually not too attached to authorship, but I definitely wrote
> that one, and that casts some doubt on the authorship of all the
> patches. For example, patch #4 has:
> 
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
> 
> but doesn't list Huacai Chen as the author. Either they are, and the
> patch needs a From: line like in patch #3, or this is co-developed,
> and you need the Co-Developed: tag ([1] has all the details).
> 

Thanks for your guidance again, I'm so sorry and please forgive
my ignorance about these rules. I'll do it as your guidance here
in future.


> I'll go and review the actual patches before the end of the week, but
> you definitely need to address the patch attributions in this series.
> 

Ok, I'll address the patch attributions in this series as soon as
possible and resend it.


> Thanks,
> 
> 	M.
> 
> [1] Documentation/process/submitting-patches.rst
>