From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.smtpout.orange.fr (smtp-73.smtpout.orange.fr [80.12.242.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 749311482F5 for ; Mon, 6 Jan 2025 22:05:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.12.242.73 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736201146; cv=none; b=ar5CsnmZ/7i6t4wDKZBt1S7fU53EwraglU4MBKHgCoCe3gBu7xlO/2LW6S/qf5ocILsFbUdlL6P80u6PziXmS7ggQenJv6YgipjUIXMqZaIMoyrllDiNXrjNX8EmSXeXEZ0cOgsW5H/RQrORvOowoc0/GHDnS/XDO1SWPViDwdE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736201146; c=relaxed/simple; bh=91YJvtHPm++W54V/Ao5KEBuMqSvuH3Owt2Har7cY1Y8=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=hEmPmhdyUEKmZQl6o7jhxFpftp6gFz0DRvNKEBNsKDlfI8vkY0qvGUvvXVSqNjnb0GsnIhz/PZJt8LlNKwTMwFmQNjPKpCc63K2eZxUawVFD7ZeZfuRW6wh9mxcIFmY2cYxPJGrmcjycoMiLVwPYdmk0CTKZFeIveLjiR+9BW7k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wanadoo.fr; spf=pass smtp.mailfrom=wanadoo.fr; dkim=pass (2048-bit key) header.d=wanadoo.fr header.i=@wanadoo.fr header.b=DCvdT4N4; arc=none smtp.client-ip=80.12.242.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wanadoo.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wanadoo.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wanadoo.fr header.i=@wanadoo.fr header.b="DCvdT4N4" Received: from [192.168.1.37] ([90.11.132.44]) by smtp.orange.fr with ESMTPA id UvE7ty6bJwCcpUvEAtVKJD; Mon, 06 Jan 2025 23:05:41 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wanadoo.fr; s=t20230301; t=1736201141; bh=F3HtqhqXFvoyrIC6n47ISNYPNgplPpn301HvMRip+UY=; h=Message-ID:Date:MIME-Version:Subject:To:From; b=DCvdT4N4Zwqo/GPGO50yTqMrwTvthCy0KkJhtWye/JdWSp2bomz9KkT5PBD7YNnNa jNNINI0+BhYWLeDnHM5q3X0jUHT2wuVKJ6mezSOfqP1fAJhBP3mGN/mfW/wvS01jln kinKSXgCwb4KWt9rdRbx0Lw/MeRd+0Ix+stZ1/4zXQC7xUBcYyeBs+LjU4dRiYSaxB PcghP05LBVofudikxGv2e8U4Fzmhd99XwiVgtsbeMBVKGocM29iIE62QvR77sdm05X 3bGEM747Y1YmvWcXNt0hUyDj+lxH0L54c7N+2ETA1b1PgIpYSwS563f0w4GzW6mSfq n+uLASIoXsxfQ== X-ME-Helo: [192.168.1.37] X-ME-Auth: bWFyaW9uLmphaWxsZXRAd2FuYWRvby5mcg== X-ME-Date: Mon, 06 Jan 2025 23:05:41 +0100 X-ME-IP: 90.11.132.44 Message-ID: <24498c4e-c517-46b9-8d0c-ff1e3a308228@wanadoo.fr> Date: Mon, 6 Jan 2025 23:05:35 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] phy: cadence-torrent: Add PCIe multilink + USB with same SSC register config for 100 MHz refclk To: Siddharth Vadapalli , vkoul@kernel.org, kishon@kernel.org, sjakhade@cadence.com, rogerq@kernel.org, thomas.richard@bootlin.com, u.kleine-koenig@baylibre.com, eballetb@redhat.com Cc: linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, srk@ti.com References: <20250106131925.263240-1-s-vadapalli@ti.com> <20250106131925.263240-3-s-vadapalli@ti.com> Content-Language: en-US, fr-FR From: Christophe JAILLET In-Reply-To: <20250106131925.263240-3-s-vadapalli@ti.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Le 06/01/2025 à 14:19, Siddharth Vadapalli a écrit : > From: Swapnil Jakhade > > Add register sequences and support for PCIe multilink + USB configuration > for 100MHz reference clock. The same SSC is used for both PCIe and USB. > > Signed-off-by: Swapnil Jakhade > Co-developed-by: Siddharth Vadapalli > Signed-off-by: Siddharth Vadapalli > --- ... > @@ -2513,6 +2517,44 @@ int cdns_torrent_phy_configure_multilink(struct cdns_torrent_phy *cdns_phy) > > phy_t1 = fns(cdns_phy->protocol_bitmask, 0); > phy_t2 = fns(cdns_phy->protocol_bitmask, 1); > + > + /** Why kernel-doc like start of comment? Only /* ? > + * PCIe Multilink configuration can be supported along with a > + * non-PCIe protocol. The existing limitation associated with > + * the standalone PCIe Multilink configuration still remains, > + * implying that there can be only two links (subnodes) of the > + * PHY type PCIe which constitute the PCIe Multilink. > + * > + * Such configurations are handled by introducing a new protocol > + * namely TYPE_PCIE_ML. Both of the PCIe links which have the > + * protocol as TYPE_PCIE shall be treated as though the protocol > + * corresponding to them is TYPE_PCIE_ML only for the sake of > + * configuring the SERDES. > + * > + * PCIe Multilink configuration can be identified by checking if > + * there are exactly two links with phy_type set to TYPE_PCIE. > + * phy_t1 and phy_t2 are modified in such cases to support the > + * PCIe Multilink configuration with a non-PCIe protocol. > + */ ... > @@ -3134,6 +3180,37 @@ static void cdns_torrent_phy_remove(struct platform_device *pdev) > cdns_torrent_clk_cleanup(cdns_phy); > } > > +/* Multilink PCIe and USB Same SSC link configuration */ > +static struct cdns_reg_pairs ml_pcie_usb_link_cmn_regs[] = { > + {0x0002, PHY_PLL_CFG}, > + {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0} > +}; Maybe const could be added here and below? > + > +static struct cdns_reg_pairs ml_pcie_usb_xcvr_diag_ln_regs[] = { > + {0x0100, XCVR_DIAG_HSCLK_SEL}, > + {0x0013, XCVR_DIAG_HSCLK_DIV}, > + {0x0812, XCVR_DIAG_PLLDRC_CTRL} > +}; ... CJ