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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a68bf621csm1709966b.165.2024.10.17.12.21.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Oct 2024 12:21:52 -0700 (PDT) Message-ID: <24b13e3c-5c05-4697-9a66-636a8ef46aab@oss.qualcomm.com> Date: Thu, 17 Oct 2024 21:21:49 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 14/14] clk: qcom: add SAR2130P GPU Clock Controller support To: Dmitry Baryshkov , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Neil Armstrong , Philipp Zabel , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241017-sar2130p-clocks-v1-0-f75e740f0a8d@linaro.org> <20241017-sar2130p-clocks-v1-14-f75e740f0a8d@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241017-sar2130p-clocks-v1-14-f75e740f0a8d@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: TTv9EUGDe-3FiSgT903C9RloP8y7d9TX X-Proofpoint-ORIG-GUID: TTv9EUGDe-3FiSgT903C9RloP8y7d9TX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 mlxscore=0 priorityscore=1501 spamscore=0 suspectscore=0 impostorscore=0 mlxlogscore=999 malwarescore=0 lowpriorityscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410170130 On 17.10.2024 6:57 PM, Dmitry Baryshkov wrote: > From: Konrad Dybcio > > Add support for the GPU Clock Controller as used on the SAR2130P and > SAR1130P platforms. > > Signed-off-by: Konrad Dybcio > Signed-off-by: Dmitry Baryshkov > --- [...] > + > +static int gpu_cc_sar2130p_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct regmap *regmap; > + int ret; > + > + regmap = qcom_cc_map(pdev, &gpu_cc_sar2130p_desc); > + if (IS_ERR(regmap)) > + return dev_err_probe(dev, PTR_ERR(regmap), "Couldn't map GPU_CC\n"); > + > + clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); > + clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); > + > + /* Keep some clocks always-on */ > + qcom_branch_set_clk_en(regmap, 0x900c); /* GPU_CC_DEMET_CLK */ > + > + ret = qcom_cc_really_probe(dev, &gpu_cc_sar2130p_desc, regmap); > + if (ret) > + return dev_err_probe(dev, ret, "Failed to register GPU_CC\n"); > + > + return ret; return qcom_cc_really_probe without printing Konrad