From: Shuai Xue <xueshuai@linux.alibaba.com>
To: "Lukas Wunner" <lukas@wunner.de>,
"Bjorn Helgaas" <helgaas@kernel.org>,
"Matthew W Carlis" <mattc@purestorage.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: anil.s.keshavamurthy@intel.com, bhelgaas@google.com,
bp@alien8.de, davem@davemloft.net, linux-edac@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-trace-kernel@vger.kernel.org, mark.rutland@arm.com,
mathieu.desnoyers@efficios.com, mhiramat@kernel.org,
naveen@kernel.org, oleg@redhat.com, peterz@infradead.org,
rostedt@goodmis.org, tianruidong@linux.alibaba.com,
tony.luck@intel.com
Subject: Re: [PATCH v8] PCI: hotplug: Add a generic RAS tracepoint for hotplug event
Date: Mon, 21 Jul 2025 21:17:55 +0800 [thread overview]
Message-ID: <25285fbd-ffab-49e5-a8be-e3a1c8e70d3c@linux.alibaba.com> (raw)
In-Reply-To: <aHtFG3QsdohG466k@wunner.de>
在 2025/7/19 15:11, Lukas Wunner 写道:
> On Sat, Jul 19, 2025 at 01:23:28PM +0800, Shuai Xue wrote:
>> <...>-120 [002] ..... 104.864051: pci_hp_event: 0000:00:03.0 slot:30, event:PCI_HOTPLUG_CARD_PRESENT
>> <...>-120 [002] ..... 104.864081: pci_hp_event: 0000:00:03.0 slot:30, event:PCI_HOTPLUG_LINK_UP
>
> Somehow I liked the simple "Link Up" and "Card present" strings more
> than this. :)
>
> The PCI_HOTPLUG substring repeats what pci_hp_event already betrays,
> that this is a hotplug event.
I think Bjorn's concern is mainly about parsing issues when strings
contain spaces.
So, how about using "Link_UP" and "Card_Present" instead?
>
>> irq/57-pciehp-120 [002] ..... 104.990434: pci_link_event: 0000:00:03.0 cur_bus_speed:20, max_bus_speed:23, width:1, flit_mode:0, reason:5
>> irq/57-pciehp-120 [002] ..... 104.992377: pci_link_event: 0000:00:03.0 cur_bus_speed:20, max_bus_speed:23, width:1, flit_mode:0, reason:0
>
> This contains a lot of terminology specific to PCI *Express*
> (versus Conventional PCI or PCI-X). Either it needs to be
> "pcie_link_event" or we need to come up with a structure that
> works for non-PCIe as well.
>
I see, I will rename it to pcie_link_event.
> PCI links can be tunneled over Thunderbolt, in this case the
> link speed is fixed to 2.5 GT/s (USB4 v1.0 sec 11.2.1), but
> in reality is governed by the speed of the Thunderbolt fabric
> (which can even be asymmetric). Do we want to report the
> virtual 2.5 GT/s in this case or the actual Thunderbolt speed?
> Or do we want a separate trace event for Thunderbolt?
I'm not a user of Thunderbolt, which way do you prefer?
>
> For Root and Downstream Ports, the physical "port" points "downstream",
> whereas for Upstream Ports and Endpoints, the physical "port" points
> "upstream". Software interpreting the trace event may want to know
> the direction (or whatever one wants to call it) because it cannot
> tell from the address 0000:00:03.0 what the PCIe type is. Having to
> look this up in lspci seems cumbersome. So it may be worthwhile to
> include either the port's direction or the device's PCIe type in the
> trace event.
>
> Of course, hotplug only exists at Root or Downstream Ports, so any
> trace event generated from the PCIe hotplug driver will pertain to
> a downstream-facing port. But the bandwidth controller also binds
> to Upstream Ports and its trace events may thus pertain to link speed
> changes at an upstream-facing port.
Got it, i will device's PCIe type,
>
> Thanks,
>
> Lukas
Thanks for valuable comments.
Best Regards,
Shuai
next prev parent reply other threads:[~2025-07-21 13:18 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-12 1:38 Shuai Xue
2025-05-19 17:10 ` Ilpo Järvinen
2025-05-20 2:36 ` Shuai Xue
2025-05-20 10:07 ` Ilpo Järvinen
2025-05-20 10:44 ` Lukas Wunner
2025-05-20 10:59 ` Ilpo Järvinen
2025-05-20 12:09 ` Lukas Wunner
2025-05-20 12:52 ` Ilpo Järvinen
2025-05-20 13:11 ` Lukas Wunner
2025-05-22 9:50 ` Shuai Xue
2025-05-31 14:15 ` Lukas Wunner
2025-07-16 6:52 ` Shuai Xue
2025-05-22 9:41 ` Shuai Xue
2025-06-02 6:30 ` Ilpo Järvinen
2025-06-23 3:04 ` Shuai Xue
2025-07-16 22:25 ` Bjorn Helgaas
2025-07-17 6:00 ` Shuai Xue
2025-07-17 19:29 ` Bjorn Helgaas
2025-07-21 8:55 ` Ilpo Järvinen
2025-07-24 22:27 ` Bjorn Helgaas
2025-07-25 4:33 ` Shuai Xue
2025-07-17 17:28 ` Matthew W Carlis
2025-07-17 19:07 ` Bjorn Helgaas
2025-07-17 20:23 ` Lukas Wunner
2025-07-17 23:27 ` Matthew W Carlis
2025-07-17 23:50 ` Bjorn Helgaas
2025-07-18 3:46 ` Matthew W Carlis
2025-07-18 5:29 ` Shuai Xue
2025-07-18 16:35 ` Bjorn Helgaas
2025-07-19 5:23 ` Shuai Xue
2025-07-19 7:11 ` Lukas Wunner
2025-07-21 13:17 ` Shuai Xue [this message]
2025-07-26 7:55 ` Lukas Wunner
2025-07-21 10:18 ` Ilpo Järvinen
2025-07-22 2:43 ` [PATCH v8] PCI: hotplug: Add a generic RAS tracepoinggt " Shuai Xue
2025-07-22 12:29 ` Ilpo Järvinen
2025-07-23 1:29 ` Shuai Xue
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