From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from casper.infradead.org (casper.infradead.org [90.155.50.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A537428AAFB; Fri, 20 Jun 2025 16:03:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=90.155.50.34 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750435427; cv=none; b=FdeKWexUs2jAIEFnpKz55RL1Uz1ACRt6iR/cuRVwqoWa/ZVLjOUYP6vV0Z8xYZV8VhcwbPpa0IPs1AeML57AJtmL2DKtU4gp7lpFrbW8liNc8dpQl3udaBuyQ5Ru4Ol6BWIxoRrf5ZQSrD7McaBxyBt6PV0ZC6n+TZwCgBCPwl0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750435427; c=relaxed/simple; bh=RPu9f+z5OQTx9H3vYantc1ws4bexPTpjNnpUtSDR93g=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=P+c+4zSVVNaHl3Evtb8CvggmWM10GnLyRrl9budZYEB6BFd4LWa32W5Uiq3KyfYAZCavOA1nvFwI1y3tzX9xDrUByPeGkgH5gbT7tRwqqFmEUUPHK+zYqEJW7bzSQGkDvxKEsfr1jCIw3bAkjNsfDYOJgbXFKhtyrqVnGw2reC8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org; spf=none smtp.mailfrom=infradead.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b=oul+Os6R; arc=none smtp.client-ip=90.155.50.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=infradead.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="oul+Os6R" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date:Message-ID:Sender :Reply-To:Content-ID:Content-Description; bh=NSB4A1BN+oe8vo2+YMkOtMxoCw9tNHrThUhqnK3l+LM=; b=oul+Os6RDpifkRz0yqsu6U/NTb +MnDf6Z3FjzrS9577VAuSwTL3/JJ6AacGXPkkHJAABXhvoPk9uWSw/UgVn42a1y6Ic4LOIlnB02IE aNXG9dfdiyQCZDlCy/KQjBaf1tjG9kpiYhJzaepD9HxeItlz3bvMp61cXcc/DdwRXE1R28kFSZEFu yd8LjCeBCwVQp68r5cuJoQE3CQloAX6vQuhgWZlzwijzXmzasWiEwBiRhalxYaKZSOEp3iCNDXfbt vipLI+60L7CYwMkMU06GTIhV/+S4a6q8QAdbRmZR/W9pMU5RSRDSWi8vmy+uRvnzv5xq8OSnTlxo1 OqSBoqPQ==; Received: from [50.53.25.54] (helo=[192.168.254.17]) by casper.infradead.org with esmtpsa (Exim 4.98.2 #2 (Red Hat Linux)) id 1uSeCd-0000000D1ab-2WJI; Fri, 20 Jun 2025 16:02:55 +0000 Message-ID: <25600557-9cd5-406c-9acf-abc163afde2d@infradead.org> Date: Fri, 20 Jun 2025 09:02:42 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCHv6 01/16] x86/cpu: Enumerate the LASS feature bits To: "Kirill A. Shutemov" , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra , Ard Biesheuvel , "Paul E. McKenney" , Josh Poimboeuf , Xiongwei Song , Xin Li , "Mike Rapoport (IBM)" , Brijesh Singh , Michael Roth , Tony Luck , Alexey Kardashevskiy , Alexander Shishkin Cc: Jonathan Corbet , Sohil Mehta , Ingo Molnar , Pawan Gupta , Daniel Sneddon , Kai Huang , Sandipan Das , Breno Leitao , Rick Edgecombe , Alexei Starovoitov , Hou Tao , Juergen Gross , Vegard Nossum , Kees Cook , Eric Biggers , Jason Gunthorpe , "Masami Hiramatsu (Google)" , Andrew Morton , Luis Chamberlain , Yuntao Wang , Rasmus Villemoes , Christophe Leroy , Tejun Heo , Changbin Du , Huang Shijie , Geert Uytterhoeven , Namhyung Kim , Arnaldo Carvalho de Melo , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, linux-mm@kvack.org, Yian Chen References: <20250620135325.3300848-1-kirill.shutemov@linux.intel.com> <20250620135325.3300848-2-kirill.shutemov@linux.intel.com> Content-Language: en-US From: Randy Dunlap In-Reply-To: <20250620135325.3300848-2-kirill.shutemov@linux.intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi-- On 6/20/25 6:53 AM, Kirill A. Shutemov wrote: > From: Sohil Mehta > > Linear Address Space Separation (LASS) is a security feature that > intends to prevent malicious virtual address space accesses across > user/kernel mode. > > Such mode based access protection already exists today with paging and > features such as SMEP and SMAP. However, to enforce these protections, > the processor must traverse the paging structures in memory. Malicious > software can use timing information resulting from this traversal to > determine details about the paging structures, and these details may > also be used to determine the layout of the kernel memory. > > The LASS mechanism provides the same mode-based protections as paging > but without traversing the paging structures. Because the protections > enforced by LASS are applied before paging, software will not be able to > derive paging-based timing information from the various caching > structures such as the TLBs, mid-level caches, page walker, data caches, > etc. > > LASS enforcement relies on the typical kernel implementation to divide > the 64-bit virtual address space into two halves: > Addr[63]=0 -> User address space > Addr[63]=1 -> Kernel address space > > Any data access or code execution across address spaces typically > results in a #GP fault. > > The LASS enforcement for kernel data access is dependent on CR4.SMAP > being set. The enforcement can be disabled by toggling the RFLAGS.AC bit > similar to SMAP. > > Define the CPU feature bits to enumerate this feature and include > feature dependencies to reflect the same. > > Co-developed-by: Yian Chen > Signed-off-by: Yian Chen > Signed-off-by: Sohil Mehta > Signed-off-by: Alexander Shishkin > Signed-off-by: Kirill A. Shutemov > --- > arch/x86/Kconfig.cpufeatures | 4 ++++ > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/include/asm/smap.h | 22 +++++++++++++++++++-- > arch/x86/include/uapi/asm/processor-flags.h | 2 ++ > arch/x86/kernel/cpu/cpuid-deps.c | 1 + > tools/arch/x86/include/asm/cpufeatures.h | 1 + > 6 files changed, 29 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/Kconfig.cpufeatures b/arch/x86/Kconfig.cpufeatures > index 250c10627ab3..9574c198fc08 100644 > --- a/arch/x86/Kconfig.cpufeatures > +++ b/arch/x86/Kconfig.cpufeatures > @@ -124,6 +124,10 @@ config X86_DISABLED_FEATURE_PCID > def_bool y > depends on !X86_64 > > +config X86_DISABLED_FEATURE_LASS > + def_bool y > + depends on !X86_64 Please explain why this is !X86_64. Thanks. > + > config X86_DISABLED_FEATURE_PKU > def_bool y > depends on !X86_INTEL_MEMORY_PROTECTION_KEYS -- ~Randy