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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-781023c203dsm3184336b3a.22.2025.09.25.20.16.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Sep 2025 20:16:59 -0700 (PDT) Message-ID: <2577fb3e-96bb-4f2e-871d-27395065ef4b@oss.qualcomm.com> Date: Fri, 26 Sep 2025 11:16:51 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 12/14] phy: qcom: qmp-usbc: Add QCS615 USB/DP PHY config and DP mode support To: Dmitry Baryshkov Cc: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, fange.zhang@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, li.liu@oss.qualcomm.com, Bjorn Andersson , Konrad Dybcio References: <20250925-add-displayport-support-for-qcs615-platform-v6-0-419fe5963819@oss.qualcomm.com> <20250925-add-displayport-support-for-qcs615-platform-v6-12-419fe5963819@oss.qualcomm.com> <5dtlqq7x36gb7cmiunoreoe2vftq46pusb75sbol47ceazefpf@lxrx3hhcwhju> From: Xiangxu Yin In-Reply-To: <5dtlqq7x36gb7cmiunoreoe2vftq46pusb75sbol47ceazefpf@lxrx3hhcwhju> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: poDtyPFIJGW6co-JDIytr2siIgH2cyzd X-Proofpoint-GUID: poDtyPFIJGW6co-JDIytr2siIgH2cyzd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTI1MDE3MSBTYWx0ZWRfXx5t8nhRIsJFV 1zSCzQbA2PvZfKAStMPrwYeUeiLBs/aTpV4Vt5wT2lP4VtyVIRfeKQ0linpf2cpwd1daEIksZCc EHybaFVeQ/xJkrb4JhR4+wm8niryNhRCXgZYH7CeBBEFWHYLLiShbfTMpw2edWYxm9jDh2TcCoo 8UTxGDYy+69Q0uupJh8dMEPg0wW7ntLDBGNs7UUqChAxe27FbjzAIk9QzCi0UnFqTSnuIicRsMH GJiKLWGU2A25xyRbJ9iwsHsjPCkm2Cs5kmLU0xgbLjaUqgXkL2Unzi1MKZHoXLSGyq+4Pdg1ZEF bGzLhpJYtqkAJTCw0GUIPf355Kt77YcdXTput08jt7LVv7OkHeVC+j05SM+AfrmWjSwR9BFSxMM 2U/KM9UOJ9MnAhzsaiG9Gtoi1yKfMA== X-Authority-Analysis: v=2.4 cv=ZsHg6t7G c=1 sm=1 tr=0 ts=68d605ad cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=DA7DBj9iRjnvuWfEG8oA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-26_01,2025-09-25_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 malwarescore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 suspectscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2509250171 On 9/26/2025 5:57 AM, Dmitry Baryshkov wrote: > On Thu, Sep 25, 2025 at 03:04:58PM +0800, Xiangxu Yin wrote: >> Add QCS615-specific configuration for USB/DP PHY, including DP init >> routines, voltage swing tables, and platform data. Add compatible >> "qcs615-qmp-usb3-dp-phy". >> >> Note: SW_PORTSELECT handling for orientation flip is not implemented >> due to QCS615 fixed-orientation design and non-standard lane mapping. >> >> Signed-off-by: Xiangxu Yin >> --- >> drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 407 +++++++++++++++++++++++++++++++ >> 1 file changed, 407 insertions(+) >> + >> +static const struct qmp_phy_init_tbl qmp_v2_dp_serdes_tbl_rbr[] = { >> + QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x2c), >> + QMP_PHY_INIT_CFG(QSERDES_COM_DEC_START_MODE0, 0x69), >> + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START1_MODE0, 0x00), >> + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START2_MODE0, 0x80), >> + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START3_MODE0, 0x07), >> + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP1_MODE0, 0xbf), >> + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP2_MODE0, 0x21), >> + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE0, 0x00), >> + QMP_PHY_INIT_CFG(QSERDES_V2_TX_LANE_MODE_1, 0xc6), > Hmm, I just noticed. This register belongs to a _different_ space. As > such you can't have it in the COM table. Thanks for pointing this out. It likely worked before because the default value (0xc6) was sufficient during validation. I'll move this configuration into configure_dp_tx() and set it based on link_rate. >> +}; >> +