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dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LY0PR12MB257519.namprd12.prod.outlook.com (2603:10b6:404:22b::7) by MN0PR12MB6054.namprd12.prod.outlook.com (2603:10b6:208:3ce::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.569.12; Mon, 2 Nov 2026 08:28:05 +0000 Received: from LY0PR12MB257519.namprd12.prod.outlook.com ([fe80::89e:d21:20ab:ae5a]) by LY0PR12MB257519.namprd12.prod.outlook.com ([fe80::89e:d21:20ab:ae5a%5]) with mapi id 15.21.0569.011; Mon, 2 Nov 2026 08:28:05 +0000 Message-ID: <25a2dbfe-20df-4fef-86c6-d3d52d66b51b@nvidia.com> Date: Mon, 2 Nov 2026 13:57:56 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] PCI: endpoint: Skip upper halves of 64-bit BARs during search To: Niklas Cassel Cc: "mani@kernel.org" , "kwilczynski@kernel.org" , "linux-pci@vger.kernel.org" , "kishon@kernel.org" , "Frank.Li@kernel.org" , "bhelgaas@google.com" , "den@valinux.co.jp" , "thierry.reding@kernel.org" , Jon Hunter , Vidya Sagar , "linux-tegra@vger.kernel.org" , "linux-kernel@vger.kernel.org" References: <20261021080644.1346549-1-mmaddireddy@nvidia.com> Content-Language: en-US X-Nvconfidentiality: public From: Manikanta Maddireddy In-Reply-To: Content-Type: text/plain; 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If the search subsequently passes a >>> reserved or disabled 64-bit BAR, it can return its upper half as an >>> independent BAR because that slot has a default programmable descriptor. >>> >>> For example, Tegra exposes a programmable 64-bit BAR0 and reserved >>> 64-bit BAR2 and BAR4. A search starting at BAR1 skips BAR1 and BAR2, >>> then incorrectly returns BAR3. The next search can similarly return >>> BAR5, causing the EPF test driver to allocate and program BARs that >>> belong to the reserved hardware windows. >> > >> 12a22fb38cbb ("PCI: tegra194: Expose BAR2 (MSI-X) and BAR4 (DMA) as >> 64-bit BAR_RESERVED"). >> >> >> I'm fine with this patch, but I think you need to rephrase the kdoc >> to reflect this new reality, because currently the kdoc is confusing/ >> not in line with the 'new' meaning of BAR_RESERVED, which can contain >> MSI-X table etc. > > To clarify, I can see that you updated the definition in: > 27ce1d8ecb9b ("PCI: endpoint: Allow only_64bit on BAR_RESERVED") > > > But, IMO it is still not super clear. > > Perhaps we should have mentioned explicitly that only_64bit is > also allowed on a BAR_RESERVED, if that reserved BAR is 64-bit. > (Since that use case is different from what the kdoc currently > says.) > > > I also think that this patch needs a Fixes tag with either: > 27ce1d8ecb9b ("PCI: endpoint: Allow only_64bit on BAR_RESERVED") > or > 12a22fb38cbb ("PCI: tegra194: Expose BAR2 (MSI-X) and BAR4 (DMA) as > 64-bit BAR_RESERVED") > > > Kind regards, > Niklas Hi, I will send V2 with kdoc update and Fixes tag. - Manikanta -- nvpublic