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Wed, 01 Jul 2026 02:25:22 -0700 (PDT) X-Received: by 2002:a17:903:4688:b0:2c9:99a2:d108 with SMTP id d9443c01a7336-2ca7e8b53f8mr11353945ad.37.1782897922220; Wed, 01 Jul 2026 02:25:22 -0700 (PDT) Received: from [10.206.100.243] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ca37c82810sm28865905ad.28.2026.07.01.02.25.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Jul 2026 02:25:21 -0700 (PDT) Message-ID: <25a71fc7-6eaf-4a6f-b511-26e1827ddc7a@oss.qualcomm.com> Date: Wed, 1 Jul 2026 14:55:16 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] arm64: dts: qcom: shikra-cqm-evk: Enable display and add ili7807s panel From: Arpit Saini To: Dmitry Baryshkov , Nabige Aala Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mohit.dsor@oss.qualcomm.com References: <20260627-shikra-dt-changes-v1-0-449a402673d0@oss.qualcomm.com> <20260627-shikra-dt-changes-v1-2-449a402673d0@oss.qualcomm.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=OuF/DS/t c=1 sm=1 tr=0 ts=6a44dd03 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=ni_s6_Wbm9bTVVOsB1UA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-ORIG-GUID: GLi4PuCBL5wEmIbhpaL-2AOuCATH10TW X-Proofpoint-Spam-Info: AW1haW4tMjYwNzAxMDA5NiBTYWx0ZWRfX5ROvM66IFFv/ 5aTSfqcDjEzmkHLNIeOMxh9fcyMInWai9lCTTvlsti9nOXdq3xVo2q/BKWBSXAkJ/YNoEyffmZ6 ToA8Sr5vL76y+Rm3JfgyVuCBNmzfGUk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzAxMDA5NiBTYWx0ZWRfX781lyP59UYJg UuO4ViB+HvmzYQmRhiHQ+W6VT4VTT3ZMabODBHy5vyz/OA7Kiis3PAuW1PD2OtAuYNPXukAe1h6 +KID5oofmpY+kd+xwXKP/X2MuhmD9orgPXnt/4rGrNvT7DPnn1aJF/I38PPie21Ngfy42DEOWTE OqOyb0ujIPFTcXzA3FSrux4H955wFJ7UJXGj/8/f2yQwCzD9dR+bVeYadEZ5xO6kOYgmRquS/GR jXquzR3K7D6hTqMV6jNhTjdNa2oyo3Iogx07UOeSxljtv70fDQ6VsitOojaXjogP5lHxiZlQkj4 Y2H3O3eDKnB1SPhAKIK6P11CwNrp/LzACtIyHoVG2W//0jlHE/7t+Cb+Jnfa3gJsb9c8Ji/XDht tAwOt/OSHWHhPe3j0O3ON0xURuq6hOJ1zSKMIiH8I0erckRews5IhPqwCASCpXRq2KVvfVwQ8wK E77kvPENbGzTOU0u4Yg== X-Proofpoint-GUID: GLi4PuCBL5wEmIbhpaL-2AOuCATH10TW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-07-01_02,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 clxscore=1015 adultscore=0 priorityscore=1501 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607010096 Hi Dmitry, On 6/29/2026 4:24 PM, Arpit Saini wrote: > Hi Dmitry, > > On 6/28/2026 6:00 PM, Dmitry Baryshkov wrote: >> On Sat, Jun 27, 2026 at 03:31:36PM +0530, Nabige Aala wrote: >>> From: Arpit Saini >>> >>> Enable the Shikra MDSS display subsystem on the Shikra CQM EVK >>> board and add the DLC0697 MIPI DSI display panel node. >>> Pin pm4125_l5 to 1.232V with regulator-allow-set-load >>> for DSI PHY PLL stability. >>> >>> Signed-off-by: Arpit Saini >>> --- >>>   arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 104 >>> ++++++++++++++++++++++++++++ >>>   1 file changed, 104 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts >>> b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts >>> index 683b5245923b..c9ea093cd8ca 100644 >>> --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts >>> +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts >>> @@ -23,6 +23,18 @@ chosen { >>>           stdout-path = "serial0:115200n8"; >>>       }; >>>   +    lcd_bias: regulator-lcd-bias { >>> +        compatible = "regulator-fixed"; >>> +        regulator-name = "lcd_bias"; >>> +        regulator-min-microvolt = <3300000>; >>> +        regulator-max-microvolt = <3300000>; >>> +        vin-supply = <&pm4125_l17>; >>> +        gpio = <&tlmm 151 GPIO_ACTIVE_HIGH>; >>> +        enable-active-high; >>> +        pinctrl-0 = <&lcd_bias_en>; >>> +        pinctrl-names = "default"; >>> +    }; >>> + >>>       wcn3988-pmu { >>>           compatible = "qcom,wcn3988-pmu"; >>>   @@ -60,6 +72,52 @@ vreg_pmu_ch1: ldo4 { >>>       }; >>>   }; >>>   +&mdss { >>> +    status = "okay"; >>> +}; >>> + >>> +&mdss_dsi0 { >>> +    vdda-supply = <&pm4125_l5>; >>> +    status = "okay"; >> Empty lines before the status property, please. > > Ack, will update. > > >>> + >>> +    panel@0 { >>> +        compatible = "dlc,dlc0697", "ilitek,ili7807s"; >>> +        reg = <0>; >>> + >>> +        reset-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; >>> + >>> +        vddi-supply = <&pm4125_l15>; >>> +        avdd-supply = <&lcd_bias>; >>> +        avee-supply = <&lcd_bias>; >> AVEE is typically the negative / ground supply. How can it be supplied >> by the same regulator as AVDD? > > Ack , I will update this using two seperate regulator-fixed nodes, > vreg_disp_p and vreg_disp_n > > as defined in schematics. > > Thanks for pointing out. > In LCD Display Bias driver , it takes vin from vph_pwr along with LCD Bias enable (GPIO 151 controlled supply) and it outputs two signals vreg_disp_p as (+5.5v) and vreg_disp_n as (-5.5v). I will update the dts as per this. Thanks Arpit >>> + >>> +        pinctrl-0 = <&panel_bl_en &panel_rst_n &panel_te_pin>; >>> +        pinctrl-1 = <&panel_bl_en_suspend &panel_rst_n_suspend>; >>> +        pinctrl-names = "default", "sleep"; >>> + >>> +        port { >>> +            panel_in: endpoint { >>> +                remote-endpoint = <&mdss_dsi0_out>; >>> +            }; >>> +        }; >>> +    }; >>> +}; >>> + >>> +&mdss_dsi0_out { >>> +    remote-endpoint = <&panel_in>; >>> +    data-lanes = <0 1 2 3>; >>> +}; >>> + >>> +&mdss_dsi0_phy { >>> +    status = "okay"; >>> +}; >>> + >>> +&pm4125_l5 { >>> +    /* DSI VDDA - must be at NOM voltage for PHY PLL lock */ >>> +    regulator-min-microvolt = <1232000>; >>> +    regulator-max-microvolt = <1232000>; >>> +    regulator-allow-set-load; >>> +}; >>> + >>>   &remoteproc_cdsp { >>>       firmware-name = "qcom/shikra/cdsp.mbn"; >>>   @@ -116,3 +174,49 @@ &wifi { >>>         status = "okay"; >>>   }; >>> + >>> +&tlmm { >>> +    lcd_bias_en: lcd-bias-en-state { >>> +        pins = "gpio151"; >>> +        function = "gpio"; >>> +        drive-strength = <2>; >>> +        bias-disable; >>> +    }; >>> + >>> +    panel_bl_en: panel-bl-en-state { >>> +        pins = "gpio91"; >>> +        function = "gpio"; >>> +        drive-strength = <2>; >>> +        bias-disable; >>> +        output-high; >> I think, recent recommendation is to sort these entries by the pin >> number. > > Ack, will update. > > >>> +    }; >>> + >>> +    panel_bl_en_suspend: panel-bl-en-suspend-state { >>> +        pins = "gpio91"; >>> +        function = "gpio"; >>> +        drive-strength = <2>; >>> +        bias-pull-down; >>> +        output-low; >>> +    }; >>> + >>> +    panel_rst_n: panel-rst-n-state { >>> +        pins = "gpio3"; >>> +        function = "gpio"; >>> +        drive-strength = <8>; >>> +        bias-disable; >>> +    }; >>> + >>> +    panel_rst_n_suspend: panel-rst-n-suspend-state { >>> +        pins = "gpio3"; >>> +        function = "gpio"; >>> +        drive-strength = <2>; >>> +        bias-pull-down; >>> +    }; >>> + >>> +    panel_te_pin: panel-te-pin-state { >>> +        pins = "gpio86"; >>> +        function = "mdp_vsync_p"; >>> +        drive-strength = <2>; >>> +        bias-pull-down; >>> +    }; >>> +}; >>> >>> -- >>> 2.34.1 >>>