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AJvYcCVaeFn5SCooPNxZdSMgA86Ex0jviW5n3np7/CiXebvAbtNjGaKIxwEhnUZY/Nv0m9fDsmTVqGoG4F3pTbo=@vger.kernel.org X-Gm-Message-State: AOJu0YzR8L5QvkoY+uYgvCtz1S6101OOrmgHpxg/itLYzCo2tMgWRsuh 796krH2xAZXwJ4tOxO89OuV2jdLNSAu8rOoO43QoadNpp7YVLytYHhEKWT6AIp8= X-Google-Smtp-Source: AGHT+IGDaXHidgJHARyBVubzO2NqL+q6YUKRQZn6433SWaj5ajYCUpE1q0Y1qN+NTxESjaN4CpGx2g== X-Received: by 2002:a05:6402:90b:b0:5be:bcdf:4110 with SMTP id 4fb4d7f45d1cf-5c08910fb32mr4066408a12.0.1724514812785; Sat, 24 Aug 2024 08:53:32 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.94]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c04a3ca4d2sm3434336a12.36.2024.08.24.08.53.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 24 Aug 2024 08:53:32 -0700 (PDT) Message-ID: <25dcd6bb-5586-4b32-9a12-7e82126cc876@tuxon.dev> Date: Sat, 24 Aug 2024 18:53:31 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 11/12] nvmem: microchip-otpc: Enable main RC oscillator clock Content-Language: en-US To: Alexander Dahl Cc: Christian Melki , Srinivas Kandagatla , "moderated list:MICROCHIP OTPC DRIVER" , open list References: <20240821105943.230281-1-ada@thorsis.com> <20240821105943.230281-12-ada@thorsis.com> From: claudiu beznea In-Reply-To: <20240821105943.230281-12-ada@thorsis.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 21.08.2024 13:59, Alexander Dahl wrote: > Without enabling that clock, initializing the packet list leads to a > read timeout on the first packet. > > According to SAM9X60 datasheet (DS60001579G) section "23.4 Product > Dependencies" the clock must be enabled for reading and writing. > > Tested on sam9x60-curiosity board. > > Signed-off-by: Alexander Dahl > --- > drivers/nvmem/microchip-otpc.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c > index a80535c3d162..047ca5ac6407 100644 > --- a/drivers/nvmem/microchip-otpc.c > +++ b/drivers/nvmem/microchip-otpc.c > @@ -8,6 +8,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -54,6 +55,7 @@ > struct mchp_otpc { > void __iomem *base; > struct device *dev; > + struct clk *clk; > struct list_head packets; > u32 npackets; > }; > @@ -272,6 +274,15 @@ static int mchp_otpc_probe(struct platform_device *pdev) > if (IS_ERR(otpc->base)) > return PTR_ERR(otpc->base); > > + // NOTE: Maybe make this optional, especially if sama7g5 testing Looking though DS, on SAMA7G5 the clock here should be MCK0. I think it should be added for SAMA7G5, too, with a fixes tag. > + // shows the clock is not required there? Use C style comments /* comment */ > + otpc->clk = devm_clk_get_enabled(&pdev->dev, "main_rc_osc"); Maybe name it "bus-clk", "bus" or something otpc specific. > + if (IS_ERR(otpc->clk)) { > + dev_err(&pdev->dev, "Error (%ld) getting clock!\n", > + PTR_ERR(otpc->clk)); > + return PTR_ERR(otpc->clk); return dev_err_probe(). > + } > + > reg = readl_relaxed(otpc->base + MCHP_OTPC_WPSR); > if (reg) > dev_warn(&pdev->dev,